JPS59100614A - フリツプフロツプ回路 - Google Patents

フリツプフロツプ回路

Info

Publication number
JPS59100614A
JPS59100614A JP57209632A JP20963282A JPS59100614A JP S59100614 A JPS59100614 A JP S59100614A JP 57209632 A JP57209632 A JP 57209632A JP 20963282 A JP20963282 A JP 20963282A JP S59100614 A JPS59100614 A JP S59100614A
Authority
JP
Japan
Prior art keywords
transistor
circuit
inverter
mos transistors
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57209632A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0352686B2 (cs
Inventor
Norishige Tanaka
田中　教成
Kenji Matsuo
松尾　研二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP57209632A priority Critical patent/JPS59100614A/ja
Publication of JPS59100614A publication Critical patent/JPS59100614A/ja
Publication of JPH0352686B2 publication Critical patent/JPH0352686B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
JP57209632A 1982-11-30 1982-11-30 フリツプフロツプ回路 Granted JPS59100614A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57209632A JPS59100614A (ja) 1982-11-30 1982-11-30 フリツプフロツプ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57209632A JPS59100614A (ja) 1982-11-30 1982-11-30 フリツプフロツプ回路

Publications (2)

Publication Number Publication Date
JPS59100614A true JPS59100614A (ja) 1984-06-09
JPH0352686B2 JPH0352686B2 (cs) 1991-08-12

Family

ID=16576005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57209632A Granted JPS59100614A (ja) 1982-11-30 1982-11-30 フリツプフロツプ回路

Country Status (1)

Country Link
JP (1) JPS59100614A (cs)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008167292A (ja) * 2006-12-28 2008-07-17 Fujitsu Ltd ラッチ回路及びそれを備えたフリップフロップ回路並びに論理回路
JP2014155163A (ja) * 2013-02-13 2014-08-25 Toshiba Corp フリップフロップ回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5579524A (en) * 1978-12-13 1980-06-16 Fujitsu Ltd Flip-flop circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5579524A (en) * 1978-12-13 1980-06-16 Fujitsu Ltd Flip-flop circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008167292A (ja) * 2006-12-28 2008-07-17 Fujitsu Ltd ラッチ回路及びそれを備えたフリップフロップ回路並びに論理回路
JP2014155163A (ja) * 2013-02-13 2014-08-25 Toshiba Corp フリップフロップ回路

Also Published As

Publication number Publication date
JPH0352686B2 (cs) 1991-08-12

Similar Documents

Publication Publication Date Title
KR100246194B1 (ko) 고속동작 디 플립플롭
JPH08256044A (ja) 記憶回路およびフリップフロップ回路
US11374567B2 (en) Circuit for low power, radiation hard logic cell
JPH03192915A (ja) フリップフロップ
JPS59100614A (ja) フリツプフロツプ回路
CN100377258C (zh) 移位寄存电路
JPH08195650A (ja) マスタスレーブ方式フリップフロップ回路
US20080030250A1 (en) Flip-flop circuit
Lu A safe single-phase clocking scheme for CMOS circuits
KR100348306B1 (ko) 레벨쉬프터
JPS60134623A (ja) １相式スタテイツク型ｄフリツプフロツプ回路
JPS6240816A (ja) ラツチ回路およびこのラツチ回路を用いたフリツプフロツプ回路
JP2000295081A (ja) レジスタ回路及びラッチ回路
JPH02198216A (ja) フリップフロップ回路
JP3235105B2 (ja) 演算回路
JPS6318181Y2 (cs)
JPS63172505A (ja) 発振停止機能付ｃｍｏｓゲ−トアレイ発振回路装置
JPH07135449A (ja) フリップフロップ回路
JPS6096914A (ja) フリツプフロツプ回路
KR200264436Y1 (ko) 셋, 리셋이 가능한 에지 트리거 플립플롭 구조
KR19980048100A (ko) 고속 및 저전력을 위한 디래치 및 디플립플롭
KR0161496B1 (ko) 트랜지스터 수가 감소된 3개 입력을 갖는 배타적 노아 게이트
KR900019382A (ko) 전 출력 전압 스윙을 갖는 고성능 BiCMOS 논리회로
JPS63211914A (ja) マスタスレ−ブ型フリツプフロツプ回路
JPH04159808A (ja) エッジトリガ型フリップフロップ回路