JPS5579524A - Flip-flop circuit - Google Patents

Flip-flop circuit

Info

Publication number
JPS5579524A
JPS5579524A JP15446078A JP15446078A JPS5579524A JP S5579524 A JPS5579524 A JP S5579524A JP 15446078 A JP15446078 A JP 15446078A JP 15446078 A JP15446078 A JP 15446078A JP S5579524 A JPS5579524 A JP S5579524A
Authority
JP
Japan
Prior art keywords
output
signal
terminal
clear
tgt1
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15446078A
Other languages
Japanese (ja)
Other versions
JPS6011489B2 (en
Inventor
Hideo Kikuchi
Megumi Minewaki
Yoji Hino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53154460A priority Critical patent/JPS6011489B2/en
Publication of JPS5579524A publication Critical patent/JPS5579524A/en
Publication of JPS6011489B2 publication Critical patent/JPS6011489B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits

Abstract

PURPOSE:To make complete-asynchronous clear operation possible by connecting the clear terminal of an FF circuit, composed of master latch ML and slave latch SL connected together via transmission gate TG, to ML. CONSTITUTION:The output of NAND circuit N1 connected to data terminal D and clear terminal CL is applied to ML composed of inverter INVa and NAND circuit N2 via TGT1 and its output is also applied to SL via TGT2. Clear signal cl is ''1'' and applied to terminal D; when clock signal (phi) is ''0'', TGT1 is open and the output of circuit N1 is latched by ML, and when signal (phi) becomes ''1'', TGT2 is open to apply the output of ML to SL, so that output terminal Q will be held at ''1''. Once signal cl becomes ''0'', outputs of circuits N1 and N2 are ''1'' and the output of INVa changes into ''0'' via TGT1. Namely, when signal cl becomes ''0'' while signal (phi) is ''0'', so that asynchronous clear operation will be done.
JP53154460A 1978-12-13 1978-12-13 flip-flop circuit Expired JPS6011489B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53154460A JPS6011489B2 (en) 1978-12-13 1978-12-13 flip-flop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53154460A JPS6011489B2 (en) 1978-12-13 1978-12-13 flip-flop circuit

Publications (2)

Publication Number Publication Date
JPS5579524A true JPS5579524A (en) 1980-06-16
JPS6011489B2 JPS6011489B2 (en) 1985-03-26

Family

ID=15584713

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53154460A Expired JPS6011489B2 (en) 1978-12-13 1978-12-13 flip-flop circuit

Country Status (1)

Country Link
JP (1) JPS6011489B2 (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57106218A (en) * 1980-12-23 1982-07-02 Fujitsu Ltd Cmos type dff circuit
JPS5861538U (en) * 1981-10-21 1983-04-25 日本電気株式会社 latch circuit
JPS59100614A (en) * 1982-11-30 1984-06-09 Toshiba Corp Flip-flop circuit
JPS59200520A (en) * 1983-04-27 1984-11-13 Hitachi Ltd Cmos flip-flop circuit
JPS6179318A (en) * 1984-09-27 1986-04-22 Fujitsu Ltd Flip flop circuit
US4631420A (en) * 1984-02-09 1986-12-23 Sanders Associates, Inc. Dynamic flip-flop with static reset
JPS6295017A (en) * 1985-10-21 1987-05-01 Nec Ic Microcomput Syst Ltd Master/slave type flip-flop circuit
JPS6424504A (en) * 1987-07-20 1989-01-26 Sharp Kk Logic circuit device
US6614276B2 (en) 2000-06-06 2003-09-02 Texas Instruments Incorporated Flip-flop design
KR100445433B1 (en) * 2002-03-21 2004-08-21 삼성에스디아이 주식회사 Organic electroluminescent display and driving method and apparatus thereof
JP2006279621A (en) * 2005-03-30 2006-10-12 Yamaha Corp Sequential circuit

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0311125B2 (en) * 1980-12-23 1991-02-15 Fujitsu Ltd
JPS57106218A (en) * 1980-12-23 1982-07-02 Fujitsu Ltd Cmos type dff circuit
JPS5861538U (en) * 1981-10-21 1983-04-25 日本電気株式会社 latch circuit
JPS59100614A (en) * 1982-11-30 1984-06-09 Toshiba Corp Flip-flop circuit
JPH0352686B2 (en) * 1982-11-30 1991-08-12 Tokyo Shibaura Electric Co
JPS59200520A (en) * 1983-04-27 1984-11-13 Hitachi Ltd Cmos flip-flop circuit
US4631420A (en) * 1984-02-09 1986-12-23 Sanders Associates, Inc. Dynamic flip-flop with static reset
JPH0352687B2 (en) * 1984-09-27 1991-08-12 Fujitsu Ltd
JPS6179318A (en) * 1984-09-27 1986-04-22 Fujitsu Ltd Flip flop circuit
JPS6295017A (en) * 1985-10-21 1987-05-01 Nec Ic Microcomput Syst Ltd Master/slave type flip-flop circuit
JPH0586687B2 (en) * 1985-10-21 1993-12-14 Nippon Electric Ic Microcomput
JPS6424504A (en) * 1987-07-20 1989-01-26 Sharp Kk Logic circuit device
US6614276B2 (en) 2000-06-06 2003-09-02 Texas Instruments Incorporated Flip-flop design
KR100445433B1 (en) * 2002-03-21 2004-08-21 삼성에스디아이 주식회사 Organic electroluminescent display and driving method and apparatus thereof
JP2006279621A (en) * 2005-03-30 2006-10-12 Yamaha Corp Sequential circuit

Also Published As

Publication number Publication date
JPS6011489B2 (en) 1985-03-26

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