JPS52124835A - Level conversion circuit - Google Patents

Level conversion circuit

Info

Publication number
JPS52124835A
JPS52124835A JP4084776A JP4084776A JPS52124835A JP S52124835 A JPS52124835 A JP S52124835A JP 4084776 A JP4084776 A JP 4084776A JP 4084776 A JP4084776 A JP 4084776A JP S52124835 A JPS52124835 A JP S52124835A
Authority
JP
Japan
Prior art keywords
level conversion
conversion circuit
input
lsi
pins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4084776A
Other languages
Japanese (ja)
Inventor
Kazuhiko Osada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4084776A priority Critical patent/JPS52124835A/en
Publication of JPS52124835A publication Critical patent/JPS52124835A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Input From Keyboards Or The Like (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To reduce the number of pins with overlapping a part of input/output signals in level conversion in case that the key input signal is input to LSI.
JP4084776A 1976-04-13 1976-04-13 Level conversion circuit Pending JPS52124835A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4084776A JPS52124835A (en) 1976-04-13 1976-04-13 Level conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4084776A JPS52124835A (en) 1976-04-13 1976-04-13 Level conversion circuit

Publications (1)

Publication Number Publication Date
JPS52124835A true JPS52124835A (en) 1977-10-20

Family

ID=12591966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4084776A Pending JPS52124835A (en) 1976-04-13 1976-04-13 Level conversion circuit

Country Status (1)

Country Link
JP (1) JPS52124835A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63151110A (en) * 1986-11-26 1988-06-23 エルサグ・インターナショナル・ビー・ブイ Improved electric source for totem pole power switch

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63151110A (en) * 1986-11-26 1988-06-23 エルサグ・インターナショナル・ビー・ブイ Improved electric source for totem pole power switch

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