JPS5339845A - Latch circuit - Google Patents

Latch circuit

Info

Publication number
JPS5339845A
JPS5339845A JP11507476A JP11507476A JPS5339845A JP S5339845 A JPS5339845 A JP S5339845A JP 11507476 A JP11507476 A JP 11507476A JP 11507476 A JP11507476 A JP 11507476A JP S5339845 A JPS5339845 A JP S5339845A
Authority
JP
Japan
Prior art keywords
latch circuit
circut
integrating
taking
reduce
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11507476A
Other languages
Japanese (ja)
Other versions
JPS6037649B2 (en
Inventor
Koichiro Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP51115074A priority Critical patent/JPS6037649B2/en
Publication of JPS5339845A publication Critical patent/JPS5339845A/en
Publication of JPS6037649B2 publication Critical patent/JPS6037649B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356069—Bistable circuits using additional transistors in the feedback circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation

Landscapes

  • Shift Register Type Memory (AREA)

Abstract

PURPOSE:To reduce the occupied area of integrating circut, by taking the circuit configuration such that one of the clock signal of the latch circuit is not used.
JP51115074A 1976-09-24 1976-09-24 latch circuit Expired JPS6037649B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51115074A JPS6037649B2 (en) 1976-09-24 1976-09-24 latch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51115074A JPS6037649B2 (en) 1976-09-24 1976-09-24 latch circuit

Publications (2)

Publication Number Publication Date
JPS5339845A true JPS5339845A (en) 1978-04-12
JPS6037649B2 JPS6037649B2 (en) 1985-08-27

Family

ID=14653521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51115074A Expired JPS6037649B2 (en) 1976-09-24 1976-09-24 latch circuit

Country Status (1)

Country Link
JP (1) JPS6037649B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63127074A (en) * 1986-11-14 1988-05-30 鳩山　正鶴 Automatic spraying machine onto inner wall of electric furnace, etc.
JP2011510423A (en) * 2008-04-22 2011-03-31 シャープ株式会社 Shift register and active matrix device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63127074A (en) * 1986-11-14 1988-05-30 鳩山　正鶴 Automatic spraying machine onto inner wall of electric furnace, etc.
JP2011510423A (en) * 2008-04-22 2011-03-31 シャープ株式会社 Shift register and active matrix device
US8982015B2 (en) 2008-04-22 2015-03-17 Sharp Kabushiki Kaisha Shift register and active matrix device

Also Published As

Publication number Publication date
JPS6037649B2 (en) 1985-08-27

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