JPS5523550A - Interface system - Google Patents

Interface system

Info

Publication number
JPS5523550A
JPS5523550A JP9571078A JP9571078A JPS5523550A JP S5523550 A JPS5523550 A JP S5523550A JP 9571078 A JP9571078 A JP 9571078A JP 9571078 A JP9571078 A JP 9571078A JP S5523550 A JPS5523550 A JP S5523550A
Authority
JP
Japan
Prior art keywords
inverter
terminal
cpu
latches
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9571078A
Other languages
Japanese (ja)
Other versions
JPS586172B2 (en
Inventor
Osamu Akiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP53095710A priority Critical patent/JPS586172B2/en
Publication of JPS5523550A publication Critical patent/JPS5523550A/en
Publication of JPS586172B2 publication Critical patent/JPS586172B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE: To make the interface between peripheral circuits and a RAM high- speed by sending a priority signal to peripheral circuits to the CPU side and reading or writing data from the RAM after a margin time.
CONSTITUTION: The output port of a CPU is connected to tri-state output latches L1 and L2 and tri-state buffer G4, and latches L1 and L2 are connected to peripheral circuit P through buffers G2 and G3. The output side of latches L1 and L2 is connected to address input end ad of a RAM, and input terminal LT of the RAM is connected to the output side of buffer G4, and output terminal OT is connected to input port LP of the CPU and circuit P. Terminal a of circuit P is connected to the CPU, and terminal b is connected to the control terminal of inverter a' and is connected to the control terminal of inverter a" and CON terminals of latches L1 and L2 and buffer G4 through inverter b'. Terminal c of circuit P is connected to inverter a', and the output side of inverter a' is connected to the output side of inverter a", and the C2 terminal of the CPU is connected to inverter a".
COPYRIGHT: (C)1980,JPO&Japio
JP53095710A 1978-08-04 1978-08-04 Interface method Expired JPS586172B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53095710A JPS586172B2 (en) 1978-08-04 1978-08-04 Interface method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53095710A JPS586172B2 (en) 1978-08-04 1978-08-04 Interface method

Publications (2)

Publication Number Publication Date
JPS5523550A true JPS5523550A (en) 1980-02-20
JPS586172B2 JPS586172B2 (en) 1983-02-03

Family

ID=14145045

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53095710A Expired JPS586172B2 (en) 1978-08-04 1978-08-04 Interface method

Country Status (1)

Country Link
JP (1) JPS586172B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60225960A (en) * 1984-04-24 1985-11-11 Yokogawa Hokushin Electric Corp Data processor
JPS60190401U (en) * 1984-05-30 1985-12-17 石川島播磨重工業株式会社 rolling mill
JPS61264451A (en) * 1985-05-20 1986-11-22 Mitsubishi Electric Corp Memory switching and controlling system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52132748A (en) * 1976-04-30 1977-11-07 Hitachi Ltd Information i/o control system
JPS5362957A (en) * 1976-11-18 1978-06-05 Nippon Telegr & Teleph Corp <Ntt> Data transfer system between central processors
JPS5384643A (en) * 1976-12-29 1978-07-26 Nec Corp Detection circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52132748A (en) * 1976-04-30 1977-11-07 Hitachi Ltd Information i/o control system
JPS5362957A (en) * 1976-11-18 1978-06-05 Nippon Telegr & Teleph Corp <Ntt> Data transfer system between central processors
JPS5384643A (en) * 1976-12-29 1978-07-26 Nec Corp Detection circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60225960A (en) * 1984-04-24 1985-11-11 Yokogawa Hokushin Electric Corp Data processor
JPS60190401U (en) * 1984-05-30 1985-12-17 石川島播磨重工業株式会社 rolling mill
JPH0120003Y2 (en) * 1984-05-30 1989-06-12
JPS61264451A (en) * 1985-05-20 1986-11-22 Mitsubishi Electric Corp Memory switching and controlling system

Also Published As

Publication number Publication date
JPS586172B2 (en) 1983-02-03

Similar Documents

Publication Publication Date Title
JPS5717049A (en) Direct memory access controlling circuit and data processing system
JPS5724005A (en) Digital signal processor
JPS56137584A (en) Semiconductor storage device
JPS5523550A (en) Interface system
JPS56110125A (en) Data processing device
JPS5537003A (en) Facsimile transmitter having redundancy suppression function
JPS5589985A (en) Semiconductor memory unit
JPS6476211A (en) Digital logic integrated circuit
JPS5619184A (en) Print system
JPS5576422A (en) Terminal unit
JPS54121630A (en) Inter-unit interface system
JPS5498277A (en) Inspecting system of input signal lines
JPS5523548A (en) Input/output control circuit
JPS5495134A (en) Data processing unit
JPS5478635A (en) Data transfer control circuit
JPS57188157A (en) Parity bit check circuit
JPS55103629A (en) Information input device
JPS5547525A (en) Data transmission method
JPS5597628A (en) Information processor
JPS5534741A (en) Micro computer input circuit
JPS5543636A (en) Digital device
JPS52124832A (en) Communication line interface circuit
JPS6441951A (en) Dma controller
JPS5498149A (en) Microprocessor
JPS6470880A (en) Digital image processor