JPS5899866A - 2重化演算処理システム - Google Patents
2重化演算処理システムInfo
- Publication number
- JPS5899866A JPS5899866A JP56196858A JP19685881A JPS5899866A JP S5899866 A JPS5899866 A JP S5899866A JP 56196858 A JP56196858 A JP 56196858A JP 19685881 A JP19685881 A JP 19685881A JP S5899866 A JPS5899866 A JP S5899866A
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- signal
- processing
- operation processing
- executes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
- G06F11/1691—Temporal synchronisation or re-synchronisation of redundant processing components using a quantum
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56196858A JPS5899866A (ja) | 1981-12-09 | 1981-12-09 | 2重化演算処理システム |
| EP82111353A EP0081238B1 (en) | 1981-12-09 | 1982-12-08 | Multi-computer system |
| DE8282111353T DE3279941D1 (en) | 1981-12-09 | 1982-12-08 | Multi-computer system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56196858A JPS5899866A (ja) | 1981-12-09 | 1981-12-09 | 2重化演算処理システム |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5899866A true JPS5899866A (ja) | 1983-06-14 |
| JPS6359184B2 JPS6359184B2 (enExample) | 1988-11-18 |
Family
ID=16364822
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56196858A Granted JPS5899866A (ja) | 1981-12-09 | 1981-12-09 | 2重化演算処理システム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5899866A (enExample) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53100743A (en) * | 1977-02-15 | 1978-09-02 | Agency Of Ind Science & Technol | Synchronous processor between processors |
| JPS53148937A (en) * | 1977-06-01 | 1978-12-26 | Hitachi Ltd | Data transfer system |
| JPS5528124A (en) * | 1978-08-15 | 1980-02-28 | Nippon Telegr & Teleph Corp <Ntt> | Synchronizing running system |
| JPS5599630A (en) * | 1979-01-25 | 1980-07-29 | Toshiba Corp | Time correction method |
-
1981
- 1981-12-09 JP JP56196858A patent/JPS5899866A/ja active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53100743A (en) * | 1977-02-15 | 1978-09-02 | Agency Of Ind Science & Technol | Synchronous processor between processors |
| JPS53148937A (en) * | 1977-06-01 | 1978-12-26 | Hitachi Ltd | Data transfer system |
| JPS5528124A (en) * | 1978-08-15 | 1980-02-28 | Nippon Telegr & Teleph Corp <Ntt> | Synchronizing running system |
| JPS5599630A (en) * | 1979-01-25 | 1980-07-29 | Toshiba Corp | Time correction method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6359184B2 (enExample) | 1988-11-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5459807B2 (ja) | マルチプロセッサデータ処理システムにおけるデバッグシグナリング | |
| ES467855A1 (es) | Una disposicion de acoplamiento en un sistema de tratamientode datos. | |
| JPS5899866A (ja) | 2重化演算処理システム | |
| JPS6070841A (ja) | サイクリック情報伝送方式 | |
| US7603541B2 (en) | Array synchronization with counters | |
| US20050114067A1 (en) | Measurement control apparatus | |
| KR102819281B1 (ko) | 이종 시스템 간 동기화 장치 및 방법 | |
| CN113721703B (zh) | 一种多路cpu系统中时钟同步控制装置、系统及控制方法 | |
| JP2003163653A (ja) | シリアルデータ通信方法 | |
| KR100206359B1 (ko) | 브이엠이 버스시스템으로 구축한 비디오 트리거보드 | |
| JPH01145758A (ja) | 多重系計算機システムの時刻同期方式 | |
| JPS59127164A (ja) | マルチシステムの同期化装置 | |
| JPS5850061A (ja) | 並列バス転送方式 | |
| KR100397508B1 (ko) | 시간일치기능이 구비된 다중 프로세서 및 그 처리방법 | |
| JP3047874B2 (ja) | システムバス回路およびマルチプロセサ | |
| JPH0395660A (ja) | 複数中央処理装置システムにおけるシステム時刻設定方式 | |
| JPH04273559A (ja) | 時分割割込制御装置 | |
| SU603983A1 (ru) | Упарвл емый генератор синхроимпульсов | |
| JPS5899865A (ja) | 多重化演算処理同期システム | |
| JPS59138147A (ja) | デ−タ伝送装置 | |
| JPH05108564A (ja) | データ転送バスシステム | |
| JPH07234840A (ja) | マルチプロセッサシステム | |
| JPH0225962A (ja) | シリアル伝送によるプロセッサ間通信方式 | |
| JPH09293047A (ja) | マイクロコンピュータのデータ転送装置 | |
| JPS6459449A (en) | Asynchronous signal synchronizing circuit |