JPS5528124A - Synchronizing running system - Google Patents

Synchronizing running system

Info

Publication number
JPS5528124A
JPS5528124A JP9941378A JP9941378A JPS5528124A JP S5528124 A JPS5528124 A JP S5528124A JP 9941378 A JP9941378 A JP 9941378A JP 9941378 A JP9941378 A JP 9941378A JP S5528124 A JPS5528124 A JP S5528124A
Authority
JP
Japan
Prior art keywords
synchronizing
units
dch
shifted
high performance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9941378A
Other languages
Japanese (ja)
Other versions
JPS599999B2 (en
Inventor
Tadakazu Morisawa
Shigekatsu Kimura
Takafumi Saito
Takahiko Yamada
Kazuo Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP53099413A priority Critical patent/JPS599999B2/en
Publication of JPS5528124A publication Critical patent/JPS5528124A/en
Publication of JPS599999B2 publication Critical patent/JPS599999B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Multi Processors (AREA)
  • Shift Register Type Memory (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE: To make high performance the program processing and to simplify it, by absorbing the defective loops in the synchronizing buffer register and reading out it in synchronous running to the file memory unit duplicated with the write-in transfer word synchronizing circuit after being shifted.
CONSTITUTION: The file memory units FMo and FM1 sequentially shift the memory content with the clock in synchronizing with the clocks CLK1 and CLK2 of CPUCCo and CC1. Further, the data channel units DCHo and DCH1 absorb the defective loops of the memory element to the synchronous buffer register, perform write-in for the defective loops after bing shifted and read out them to the duplicated units FMo and FM1 with the transfer word synchronizing circuits SYC1 and SYC2 in synchronizing operation. Thus, the program processing can be made high performance and simplified.
COPYRIGHT: (C)1980,JPO&Japio
JP53099413A 1978-08-15 1978-08-15 Synchronous operation method Expired JPS599999B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53099413A JPS599999B2 (en) 1978-08-15 1978-08-15 Synchronous operation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53099413A JPS599999B2 (en) 1978-08-15 1978-08-15 Synchronous operation method

Publications (2)

Publication Number Publication Date
JPS5528124A true JPS5528124A (en) 1980-02-28
JPS599999B2 JPS599999B2 (en) 1984-03-06

Family

ID=14246784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53099413A Expired JPS599999B2 (en) 1978-08-15 1978-08-15 Synchronous operation method

Country Status (1)

Country Link
JP (1) JPS599999B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5899866A (en) * 1981-12-09 1983-06-14 Hitachi Ltd Multiplexing operation processing system
JPS5899865A (en) * 1981-12-09 1983-06-14 Hitachi Ltd Multiplexing operation processing synchronizing system
JPS5922297A (en) * 1982-07-29 1984-02-04 Hitachi Ltd Method for writing stored content in duplicated device
JPS6074859A (en) * 1983-09-30 1985-04-27 Fujitsu Ltd Inter-system synchronizing system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5899866A (en) * 1981-12-09 1983-06-14 Hitachi Ltd Multiplexing operation processing system
JPS5899865A (en) * 1981-12-09 1983-06-14 Hitachi Ltd Multiplexing operation processing synchronizing system
JPS6246028B2 (en) * 1981-12-09 1987-09-30 Hitachi Ltd
JPS6359184B2 (en) * 1981-12-09 1988-11-18
JPS5922297A (en) * 1982-07-29 1984-02-04 Hitachi Ltd Method for writing stored content in duplicated device
JPS6074859A (en) * 1983-09-30 1985-04-27 Fujitsu Ltd Inter-system synchronizing system
JPH0325065B2 (en) * 1983-09-30 1991-04-04 Fujitsu Kk

Also Published As

Publication number Publication date
JPS599999B2 (en) 1984-03-06

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