JPS5922297A - Method for writing stored content in duplicated device - Google Patents

Method for writing stored content in duplicated device

Info

Publication number
JPS5922297A
JPS5922297A JP57131282A JP13128282A JPS5922297A JP S5922297 A JPS5922297 A JP S5922297A JP 57131282 A JP57131282 A JP 57131282A JP 13128282 A JP13128282 A JP 13128282A JP S5922297 A JPS5922297 A JP S5922297A
Authority
JP
Japan
Prior art keywords
clock
writing
data
spare
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57131282A
Other languages
Japanese (ja)
Inventor
Ryuichi Toki
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57131282A priority Critical patent/JPS5922297A/en
Publication of JPS5922297A publication Critical patent/JPS5922297A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/74Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies

Abstract

PURPOSE:To write data in a spare system immediately by writing the same content as a current system in the spare system at the same timing on the basis of clock at the writing in the current system. CONSTITUTION:When a device A is used at present, a clock (a) is applied to the device A as a writing clock (b) and a writing clock b' is also applied to the spare system. Since an FF5 is normally in a reset state, both selectors 2, 2' select and output the clock (a) on the basis of the output (g) of the FF5 and are enabled to write data at the same timing and clock. At the writing in a memory 4, the clock (b) is acted as a write timing signal and a control circuit 3 supplies address data writing data (c), but in the spare system, the clock b' is acted as the write timing signal for a memory 4' and the memory 4' receives the same data (d) as the data (c). Consequently, the same contents are written in both the systems at the same timing.
JP57131282A 1982-07-29 1982-07-29 Method for writing stored content in duplicated device Pending JPS5922297A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57131282A JPS5922297A (en) 1982-07-29 1982-07-29 Method for writing stored content in duplicated device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57131282A JPS5922297A (en) 1982-07-29 1982-07-29 Method for writing stored content in duplicated device

Publications (1)

Publication Number Publication Date
JPS5922297A true JPS5922297A (en) 1984-02-04

Family

ID=15054297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57131282A Pending JPS5922297A (en) 1982-07-29 1982-07-29 Method for writing stored content in duplicated device

Country Status (1)

Country Link
JP (1) JPS5922297A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6308244B1 (en) 1993-02-26 2001-10-23 Mitsubishi Denki Kabushiki Kaisha Information processing apparatus with improved multiple memory access and control

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5528124A (en) * 1978-08-15 1980-02-28 Nippon Telegr & Teleph Corp <Ntt> Synchronizing running system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5528124A (en) * 1978-08-15 1980-02-28 Nippon Telegr & Teleph Corp <Ntt> Synchronizing running system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6308244B1 (en) 1993-02-26 2001-10-23 Mitsubishi Denki Kabushiki Kaisha Information processing apparatus with improved multiple memory access and control

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