JPS5856417A - Low-temperature activating method for boron ion implanted layer in silicon - Google Patents
Low-temperature activating method for boron ion implanted layer in siliconInfo
- Publication number
- JPS5856417A JPS5856417A JP15514881A JP15514881A JPS5856417A JP S5856417 A JPS5856417 A JP S5856417A JP 15514881 A JP15514881 A JP 15514881A JP 15514881 A JP15514881 A JP 15514881A JP S5856417 A JPS5856417 A JP S5856417A
- Authority
- JP
- Japan
- Prior art keywords
- ion
- layer
- implanted layer
- boron
- implanted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910052796 boron Inorganic materials 0.000 title claims abstract description 53
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 44
- 239000010703 silicon Substances 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 title claims abstract description 17
- 230000003213 activating effect Effects 0.000 title claims description 3
- 239000000758 substrate Substances 0.000 claims abstract description 40
- -1 Boron ions Chemical class 0.000 claims abstract description 30
- 150000002500 ions Chemical class 0.000 claims abstract description 21
- 230000004913 activation Effects 0.000 claims abstract description 16
- 230000007547 defect Effects 0.000 claims abstract description 5
- 238000005468 ion implantation Methods 0.000 claims description 37
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 36
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 30
- 238000010438 heat treatment Methods 0.000 claims description 27
- 238000009826 distribution Methods 0.000 claims description 20
- 238000002513 implantation Methods 0.000 claims description 19
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 5
- 239000012298 atmosphere Substances 0.000 abstract description 4
- 229910052757 nitrogen Inorganic materials 0.000 abstract 1
- 230000001105 regulatory effect Effects 0.000 abstract 1
- 239000012535 impurity Substances 0.000 description 9
- 238000002347 injection Methods 0.000 description 7
- 239000007924 injection Substances 0.000 description 7
- 239000013078 crystal Substances 0.000 description 5
- 229910052732 germanium Inorganic materials 0.000 description 4
- 230000005465 channeling Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910001432 tin ion Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 241000894007 species Species 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001638 boron Chemical class 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 210000004916 vomit Anatomy 0.000 description 1
- 230000008673 vomiting Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- General Physics & Mathematics (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Health & Medical Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Physical Vapour Deposition (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、シリコン基体中にイオン注入法によって導入
した硼素イオン注入層の改良された低温活性化方法に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved low temperature activation method of a boron ion implantation layer introduced into a silicon substrate by ion implantation.
シリコン集積回路等を中心とする半導体集積回路は高密
度化、高速化する目的で、回路を構成する種々の能動素
子や受動素子の微細化が進められている。シリコン集積
回路の製造工程においては、種々の熱処理工程（最高温
度１０００〜１１００℃）を必要とするが、熱処理温度
管できるだけ下げて基体中のドーピング不純物の移動乃
至再分布を抑制することは、上記微細化を図ってゆく場
合に重要である。近年、シリコン等の半導体基体中への
不純物精密ドーピング万法として、イオン注入法が広範
に用いられるようになった０通常、イオン注入工程を経
た基体には熱処理工程が加えられ、ドーピング不純物の
電気的活性化とイオン注入時基体結晶中に生じた結晶損
傷の回復とが同時に図られる。この場合の熱処理温度と
しては、通常、９００〜１０００℃程度が必要とされる
。このような温度領域では、硼素（Ｂ）ｔはじめとする
ドーピング不純物の殆どはシリコン基体中で拡散してし
まい、よツ一層の微細素子の製造は困難である。BACKGROUND ART In order to increase the density and speed of semiconductor integrated circuits, mainly silicon integrated circuits, various active elements and passive elements that constitute the circuits are being miniaturized. The manufacturing process of silicon integrated circuits requires various heat treatment steps (maximum temperature 1000 to 1100°C), but it is important to lower the heat treatment temperature as much as possible to suppress the movement or redistribution of doping impurities in the substrate. This is important when trying to achieve miniaturization. In recent years, the ion implantation method has become widely used as a method for precisely doping impurities into semiconductor substrates such as silicon.Normally, the substrate that has undergone the ion implantation process is subjected to a heat treatment process to remove the electricity of the doping impurity. Activation of the crystal and recovery of crystal damage caused in the base crystal during ion implantation are simultaneously achieved. The heat treatment temperature in this case is usually about 900 to 1000°C. In such a temperature range, most of the doping impurities including boron (B)t diffuse into the silicon substrate, making it difficult to manufacture even finer devices.
微細素子実現のためには、イオン注入によって基体中に
ドーピングされた不純物の再分布が殆ど生じない様な、
低温度領域での不純物の電気的活性化の方法が強く望ま
れる。In order to realize microscopic devices, it is necessary to create a structure in which there is almost no redistribution of impurities doped into the substrate by ion implantation.
A method of electrically activating impurities in a low temperature region is strongly desired.
シリコン基体中にイオン注入された硼素不純物の低温活
性化を図る場合に、従来、硼素イオン注入とシリコン等
のイオン注入とｔ重！Ｌ嘔せる方法が知られている。こ
の方法によると、硼素イオン注入層管形成後、シリコン
等硼素原子よシも大きい質量数含有する元素をシリコン
基体中に高濃度に注入して、非晶質シリコン層を硼素イ
オン注入層を内包するが如く形成しておく仁とによって
、６００℃程度の熱処理で硼素イオン注入層’ｋ１２）
１００％近く活性化できる。Conventionally, when attempting low-temperature activation of boron impurities ion-implanted into a silicon substrate, boron ion implantation and ion implantation of silicon, etc., have been combined. There are known ways to make people vomit. According to this method, after forming a boron ion-implanted layer tube, an element containing a larger mass number than boron atoms, such as silicon, is implanted at a high concentration into the silicon substrate to form an amorphous silicon layer containing the boron ion-implanted layer. The boron ion-implanted layer 'k12) is formed by heat treatment at about 600°C, depending on the layer formed as described above.
It can be activated close to 100%.
ところが、シリコン集積囲路等の製造工程においては、
硼素等の不純物をイオン注入した後・例えば５００℃以
下の温度下で熱処理をしなければ力らない場合がしばし
ばある。斯様な場合に上記従来の方法を其侭用いると熱
処理温度が５００℃以下に制限されるために、硼素イオ
ン注入後のシリコンイオン注入によりて生ぜしめた非晶
質層が充分に再結晶化せず、特にＰ＋−ｎ接合を形成し
た際には、接合部より深部の領域に存在する。シリコン
イオン注入による残留欠陥のために接合リークが生じ易
く、良好な素子を形成することができなかつ九。However, in the manufacturing process of silicon integrated enclosures, etc.
After ion implantation of impurities such as boron, it is often necessary to perform heat treatment at a temperature of, for example, 500° C. or lower. If the above conventional method is used in such a case, the heat treatment temperature is limited to 500°C or less, so that the amorphous layer produced by silicon ion implantation after boron ion implantation cannot be sufficiently recrystallized. In particular, when a P+-n junction is formed, it exists in a region deeper than the junction. Junction leakage is likely to occur due to residual defects caused by silicon ion implantation, making it impossible to form a good device.
本発明は上記従来法の欠点を解消した・シリコン基体中
の硼素イオン注入層の低温活性化方法を提供するもので
ある。The present invention provides a method for low-temperature activation of a boron ion implanted layer in a silicon substrate, which eliminates the drawbacks of the above-mentioned conventional methods.
本発明は、シリコン基体中に硼Ｘをイオン注入して得ら
れる第１のイオン注入層と硼素イオンよシも質量数が大
きく且つシリコン基体の導電型に影響を与えないイオン
管注入して得られる第２のイオン注入層とを、その濃度
分布の極太値の位置を略合致させ、且つその極大値より
深い領域での第２のイオン注入層の濃度分布の広がシが
第１のイオン注入層の濃度分布の広がシを越えない様に
重畳せしめて形成した後、熱処理を行うことにより第１
のイオン注入層、即ち硼素イオン注入層の電気的活性化
管口ることを特徴としている。第２のイオン注入層の注
入量は、イオン種により異なるが少くとも５×１０１４
個／♂以上とすることが好ましい。不発・明によれば、
第１．第２のイオン注入層の濃度分布を規定することに
よりて、その後の熱処理を例えば５００℃以下の低い温
度で行りたとしても、第２のイオン注入層による非晶質
層や残留欠陥の影響が少なく、リーク等の少ないｐｎ接
合を形成することができる。The present invention provides a first ion-implanted layer obtained by ion-implanting boron X into a silicon substrate, and a first ion-implanted layer obtained by ion tube implantation, which has a larger mass number than boron ions and does not affect the conductivity type of the silicon substrate. The position of the thickest value of the concentration distribution of the second ion-implanted layer is made to substantially coincide with that of the first ion-implanted layer, and the concentration distribution of the second ion-implanted layer in a region deeper than the maximum value is made to match that of the first ion-implanted layer. After forming the injection layers so as not to exceed the width of the concentration distribution, the first layer is formed by heat treatment.
It is characterized by an electrically activated channel for the ion-implanted layer, that is, the boron ion-implanted layer. The implantation amount of the second ion implantation layer varies depending on the ion species, but is at least 5×1014
It is preferable to set the number to 1/2 or more. According to Undiscovered Ming,
1st. By defining the concentration distribution of the second ion-implanted layer, even if the subsequent heat treatment is performed at a low temperature of 500°C or less, the influence of the amorphous layer and residual defects caused by the second ion-implanted layer It is possible to form a pn junction with less leakage and the like.
以下、本発明の具体的実施例について説明する。Hereinafter, specific examples of the present invention will be described.
〔実施例１〕
比抵抗〜２０Ω・国のｎ型Ｓ１基体に注入エネルギー２
０ ｋｅＶ テ例工ばＩ Ｘ １０” 個／ｃｍ”Ｏ注
入量にて硼素イオン（Ｂ＋：質量数１１）を注入する・
続いてこの硼素イオン注入層に重畳せしめて、注入エネ
に！ −４５ｋ＠Ｖ テＩ Ｘ １０”個／♂、ノ注入
量にてシリコンイオン（ｓｔ” ：質量数２８）を注入
する。この時の注入イオンのＳｉ基体中における濃度分
布は略第１図に示す如く１なる。尚、上記イオン注入は
云わゆるチャネリング現象を生ぜしめない状況下にて行
なりた。上記工程度、８１基体を窒素（Ｎ２）雰囲気中
で熱処理した。[Example 1] Specific resistance ~20Ω・Injected energy 2 into n-type S1 substrate
For example, boron ions (B+: mass number 11) are implanted at a dose of 0 keV I x 10"/cm"O.
Next, superimpose it on this boron ion implantation layer to create implantation energy! Silicon ions (st": mass number 28) are implanted at an implantation amount of -45 k@V teI x 10"/♂. At this time, the concentration distribution of the implanted ions in the Si substrate is approximately 1 as shown in FIG. Incidentally, the above ion implantation was performed under conditions that did not cause the so-called channeling phenomenon. At the above step, 81 substrates were heat treated in a nitrogen (N2) atmosphere.
熱処理温度は４８０℃、熱処理時間は３０分であった。The heat treatment temperature was 480°C and the heat treatment time was 30 minutes.
該熱処理後の上記イオン注入層の層抵抗値は０．２４に
Ω１０でありた・又１この硼素イオン注入層（Ｐ＋層）
と基体（ｎ型）との間の逆方向リーク電流特性（接合リ
ーク）金調べた結果、逆方向印加電圧８ｖに対し〜３×
１０Ａ／ｃｙｒ”程度のリーク電流密度であった。The layer resistance value of the ion-implanted layer after the heat treatment was 0.24Ω10. Also, the boron ion-implanted layer (P+ layer)
As a result of investigating the reverse leakage current characteristics (junction leakage) between the substrate and the substrate (n-type), it was found that ~3× for a reverse applied voltage of 8V.
The leakage current density was about 10A/cyr''.
比較の友めに１０００℃、１０分間の熱処理な施した場
合には、得られた層抵抗値は０．１３にΩ／口であり、
また、イオン注入層と基体との間のリーク電流密度は〜
１０ Ａ／ｍ”（逆方向電圧８ｖ印加時）であった。For comparison, when heat treatment was performed at 1000°C for 10 minutes, the obtained layer resistance value was 0.13Ω/mouth,
Also, the leakage current density between the ion-implanted layer and the substrate is ~
10 A/m'' (when applying a reverse voltage of 8 V).
１０００℃の熱処理と比較すると活性化の度合が若干少
なく、またリーク電流も若干大きい〃ζ４８０℃という
低温であっても実用的には充分な電気的活性化が行われ
、またリーク電流密度も実用上全く問題にならないレベ
ルに抑、ｔられていることがわかる。Compared to heat treatment at 1000°C, the degree of activation is slightly lower, and the leakage current is also slightly larger.Even at a low temperature of ζ480°C, sufficient electrical activation is achieved for practical use, and the leakage current density is also low enough for practical use. It can be seen that this has been suppressed to a level that does not pose a problem at all.
〔実施例２〕
比抵抗〜２０Ω・創のｎ型Ｓ１基体に注入エネルギー２
０ｋｅ■でＩ Ｘ １０”個／個３の注入量にて硼素イ
オン（Ｂ＋、質量数１１）を注入する。続いて前記硼素
イオンの注入層に重畳せしめて注入エネルギー１５０
ｋｅＶで、５ Ｘ １０１４個／Ｇ″の注入量にて錫イ
オン（Ｓｎ” 、質量数１１８．７）を注入する。この
時の上記注入イオンのＳｉ基体中における濃度分布は略
第２図に示す如くなる。尚、実施例１と同様上記イオン
注入はチャネリング現象を生せしめない条件下にて行な
った。上記工程後、Ｓｔ基体を窒素（Ｎ２）雰囲気中で
熱処理した。熱処理温度は４８０℃、熱処理時間は３０
分であった。該熱処理後の上記イオン注入層の層抵抗値
は、実施例１の場合よシさらに小さく、０．１９にΩ／
口であった。また、逆方向リーク電流特性を調べ次結果
、逆方向印加電圧８■に対し〜Ｉ Ｘ １０ Ａ／ｍ
”となり、さらに改善が認められた。[Example 2] Energy 2 injected into n-type S1 substrate with specific resistance ~20Ω/wound
Boron ions (B+, mass number 11) are implanted at an implantation dose of I x 10''/3 at 0ke.Subsequently, the boron ions are superimposed on the implanted layer of boron ions, and the implantation energy is 150.
Tin ions (Sn'', mass number 118.7) are implanted at keV and at an implantation dose of 5 x 1014 ions/G''. At this time, the concentration distribution of the implanted ions in the Si substrate is approximately as shown in FIG. Note that, as in Example 1, the ion implantation was performed under conditions that did not cause the channeling phenomenon. After the above steps, the St substrate was heat treated in a nitrogen (N2) atmosphere. Heat treatment temperature is 480℃, heat treatment time is 30
It was a minute. The layer resistance value of the ion-implanted layer after the heat treatment is even smaller than that of Example 1, and is 0.19Ω/
It was the mouth. In addition, we investigated the reverse leakage current characteristics and found that for a reverse applied voltage of 8 cm, ~I x 10 A/m
”, further improvement was observed.
〔実施例３〕
本実施例では、実施例１．２で述べたシリコンイオン、
錫イオンの代わりにゲルマニウムイオン（Ｇ＠＋、質量
数７３）を硼素イオン注入層に重畳せしめて注入した。[Example 3] In this example, silicon ions described in Example 1.2,
Instead of tin ions, germanium ions (G@+, mass number 73) were implanted to overlap the boron ion implantation layer.
ゲルマニウムのイオン注入条件は、注入エネルギー１１
０ ｋｅＶ、注入量５ Ｘ １０１４個／ｃｍ”であっ
た。他の条件は実施例１．２と略同様である。窒素雰囲
気中、４８０℃３０分の熱処理後に得られた上記イオン
注入層の層抵抗値は０．２１にΩ１０であった。The germanium ion implantation conditions are implantation energy 11
0 keV, and the implantation amount was 5 x 1014 ions/cm''.Other conditions were almost the same as in Example 1.2. The layer resistance value was 0.21Ω10.
又、逆方向の接合リーク特性は、逆方向印加電圧８■に
対し、１．８ Ｘ １０ Ａ／ｃｍ”と実用的に充分
なレベルのリーク電流密度であっ几。In addition, the junction leakage characteristic in the reverse direction is 1.8 x 10 A/cm'' for a reverse applied voltage of 8 cm, which is a practically sufficient level of leakage current density.
上記実施例で明らかな様に、本発明の方法を用いること
によって、実用的に充分なレベルの硼素イオン注入層の
低温活性化全初期の濃度分布を殆ど変えないで図ること
ができる。本発明の特徴は、従来例の様に・硼素イオン
注入後のシリコン基体に単にシリコンイオンを非晶質化
に充分な量注入するだけではなく、硼素イオン注入層に
対するシリコンイオン注入層濃度分布を厳密に駆足して
形成することにある。すなわち、具体的には、シリコン
基体に硼素イオン注入層形成後・前記硼素イオン注入層
の深部において硼素濃度分布の広がりを越えない様に、
且つ深さ方向からみた濃度分布の極太値の位置を略合致
させる様にしてシリコンイオン注入層を形成する。シリ
コンイオン注入濃度分布の極大値位置が硼素イオンの注
入濃度分布の極大値位置より離れると、熱処理時の硼素
不純物の電気的活性化効率が悪くなる。極太値の位置は
注入エネルギーに依って一義的に決定されるので、シリ
コンイオンの注入エネルギーを変え次場合の熱処理後の
硼素イオン注入層々抵抗値を、硼素イオン注入量ｌＸ１
０”個／♂、シリコンイオン注入１１Ｘ１０１′１個／
ｌｙｒ”の組み合わせについて、下表に示す。As is clear from the above embodiments, by using the method of the present invention, it is possible to achieve a practically sufficient level of low-temperature activation of the boron ion-implanted layer with almost no change in the initial concentration distribution. The feature of the present invention is that unlike the conventional example, silicon ions are not simply implanted in a sufficient amount to make the silicon substrate amorphous after boron ion implantation, but the concentration distribution of the silicon ion implanted layer relative to the boron ion implanted layer is The goal is to form it through rigorous efforts. Specifically, after forming a boron ion implanted layer on a silicon substrate, in order not to exceed the spread of the boron concentration distribution in the deep part of the boron ion implanted layer,
In addition, the silicon ion implantation layer is formed so that the positions of the thickest values of the concentration distribution as seen from the depth direction are substantially coincident with each other. If the maximum value position of the silicon ion implantation concentration distribution is far from the maximum value position of the implantation concentration distribution of boron ions, the electrical activation efficiency of boron impurities during heat treatment deteriorates. Since the position of the thickest value is uniquely determined by the implantation energy, the resistance value of the boron ion implanted layer after heat treatment in the following case is determined by changing the boron ion implantation amount lX1.
0" piece/♂, silicon ion implantation 11X101' 1 piece/
The combinations of "lyr" are shown in the table below.
注入エネルギー２０ ｋｅＶの硼素イオン注入層の濃度
分布極大値がシリコン基体表面から深さ略６６０Ｘの位
置にあるのに対し、注入エネルギーが（ａ） ２５ ｋ
＠Ｖ 、 （ｂ） ４５ ｋ＠Ｖ 、 （ｅ） １００
ｋｅＶのシリコンイオン注入層の濃度極大値の位置は
、シリコン基体表面からの深さが、夫々略（ａ）３５０
芙、 （ｂ） ６３０ Ｘ 、 （ｅ） １４７０ Ｘ
の位置にある。The maximum value of the concentration distribution of the boron ion implanted layer with an implantation energy of 20 keV is located at a depth of approximately 660X from the silicon substrate surface, whereas the implantation energy is (a) 25 k
@V, (b) 45 k@V, (e) 100
The position of the maximum concentration value of the keV silicon ion-implanted layer is located at a depth of approximately (a) 350 m from the silicon substrate surface.
Frog, (b) 630 X, (e) 1470 X
It is located at
これらイオン注入層の濃度分布状態を第３図に示す。エ
ネルギーが４５ ｋｅＶの場合に層抵抗値が最も小さく
なることが我から分かる。尚、注入エネルギーが１００
ｋｅＶの場合のシリコンイオン注入層の濃度分布の広
がりは基体の深部では硼素イオン注入層の濃度分布領域
から完全にはみ出しておシ、４８０℃程度の熱処理温度
ではシリコンイオン注入による基体シリコン中の残留欠
陥が基体深部に多量に存在するため、逆方向リーク電流
レベルが高＜ （１０Ａ／ａ＋＋”以上）、実用に供し
得ないことは云うまでもない。FIG. 3 shows the concentration distribution state of these ion-implanted layers. We know that the layer resistance value is the smallest when the energy is 45 keV. In addition, the injection energy is 100
In the case of keV, the concentration distribution of the silicon ion implantation layer spreads completely beyond the concentration distribution region of the boron ion implantation layer in the deep part of the substrate. Needless to say, since there are a large number of defects deep within the substrate, the level of reverse leakage current is high < (10 A/a++" or more) and cannot be put to practical use.
第４図は、上記硼素イオン注入層（Ｂζ２０ｋｅＶ Ｉ
Ｘ １０”個／ｃｐＩＩ” ）に重畳せしめて、注入
エネルギー４５ ｋｅＶにてシリコンイオンを注入し基
体を窒素芥囲気中で低温処理（４８０℃、３０分）した
場合の、シリコンイオン注入量に対する硼素イオン注入
層の層抵抗値を示したものである。第４図にはまた、上
記シリコンイオン注入の代わシに錫イオンを注入エネル
ギー１５０に・Ｖ（濃度極大値はシリコンイオン表面か
らの深さ〜６４０Ｘの位置）にて注入した場合、および
ゲルマニウムを注入エネルギー１１０ｋｅＶ （濃度極
大値位置はシリコン表面からの深さ〜６５０Ｘ）にて注
入した場合の同様の低温処理による結果も示した。第４
図から明らかな様に、硼素イオン注入層の低温活性化効
果は重畳注入せしめるイオンの質量数が大きい程大きく
、又重畳注入イオンの質量数が大きくなれば、比較的低
い注入量（２〜３ Ｘ １０１４個／♂）で硼素イオン
注入層の低温活性化が実現できる。FIG. 4 shows the boron ion-implanted layer (Bζ20keV I
When silicon ions are implanted at an implantation energy of 45 keV and the substrate is treated at a low temperature (480°C, 30 minutes) in a nitrogen atmosphere, the boron ion implantation amount is It shows the layer resistance value of the ion-implanted layer. Figure 4 also shows the case where tin ions are implanted at an implantation energy of 150 V (the maximum concentration is at a depth of ~640X from the silicon ion surface) instead of the silicon ion implantation described above, and germanium. The results of similar low-temperature treatment when implanted at an implantation energy of 110 keV (maximum concentration position: depth from the silicon surface to 650X) are also shown. Fourth
As is clear from the figure, the low-temperature activation effect of the boron ion-implanted layer increases as the mass number of the ions to be superimposedly implanted increases, and as the mass number of the superimposedly implanted ions increases, the implantation amount (2 to 3 Low-temperature activation of the boron ion-implanted layer can be realized with X 1014 pieces/male).
なお、本発明において、第１．第２のイオン注入層の濃
度分布の極大値そのものはいずれが大きくても構わない
。また実施例では、硼素イオン注入層の形成は注入エネ
ルギー２０ｋｅＶ。In addition, in the present invention, 1. It does not matter whether the maximum value of the concentration distribution of the second ion-implanted layer is large. Further, in the example, the boron ion implantation layer was formed at an implantation energy of 20 keV.
注入量Ｉ Ｘ １０”個／ｃＩＩＫ”にて行なったが、
注入エネルギー、注入量とも前記値に限定石れるもので
はなく任意で良い、又低温熱処理条件ケ災施例の如く４
８０℃、３０分間に限定されるものではなく、４００℃
以下においても（４８０℃におけるよりも活性化率は劣
るが）本発明の効果は確認できた。一般には、熱処理温
度の上昇や熱処理時間の増加と共に硼素の活性化率が増
力口することも確められた。第２のイオン注入層を本発
明の如く形成し゛て硼素の活性化率が高められる熱処理
温度の領域は、種々の冥験の結果、４００℃〜９００℃
であル、９００℃以上の温度領域の熱処理では、硼素イ
オン注入層単独のは殆どみられなかった・熱処理雰囲気
は窒素ガスに限定されるものではなく、アルゴンや水素
等の不活性ガス、酸化性ガス或いはそれらの混合物であ
っても良い。熱処理方法としては、通常の炉による場合
の他、場合によってはレーザービーム、′＃Ｌ子ビーム
等の高密度、エネルギー蘇照射法を用いても良い。又、
上記実施例では、硼素イオン注入層に重畳せしめて行な
うイオン注入のイオン種としてシリコン（８１”）、錫
（Ｓｎ ）、ゲルマニウム（Ｇ＠”）を用いた力！、シ
＋
リコン基体中に導入して導電型を変イヒさせず、且つシ
リコン基体を非晶質化するために有効なイオンならば何
んでも良い。一般的には硼素イオン二やも質量数が大き
い、第■族元素および・稀ガス元素の中から選ばれる。The injection amount was I x 10”/cIIK”.
Both the injection energy and the injection amount are not limited to the above values and can be set arbitrarily, and the low temperature heat treatment conditions are 4 as in the case example.
Not limited to 80℃ for 30 minutes, but 400℃
The effect of the present invention was also confirmed below (although the activation rate was inferior to that at 480°C). It was also confirmed that, in general, the activation rate of boron increases as the heat treatment temperature and heat treatment time increase. As a result of various experiments, the heat treatment temperature range in which the activation rate of boron is increased by forming the second ion-implanted layer as in the present invention is 400°C to 900°C.
However, during heat treatment in the temperature range of 900°C or higher, a single boron ion implanted layer was hardly seen.The heat treatment atmosphere is not limited to nitrogen gas, but may also include inert gases such as argon or hydrogen, or oxidizing gases. It may be a gas or a mixture thereof. As the heat treatment method, in addition to using a normal furnace, high-density, energy resuscitation irradiation methods such as laser beams and '#L beams may be used depending on the case. or,
In the above embodiment, silicon (81"), tin (Sn), and germanium (G@") were used as ion species for ion implantation superimposed on the boron ion implantation layer. , + Any ion may be used as long as it does not change the conductivity type when introduced into the silicon substrate and is effective for making the silicon substrate amorphous. In general, boron ions are selected from group Ⅰ elements and rare gas elements, which have large mass numbers.
或いはζこれ等を組み合わせて使用しても良い・これ等
のイオン稲を用いる場合には、本発明の効果を達成する
友めに・注入エネルギー、注入量（略５×１０１４個／
♂以上）を適宜選択すべきことは云うまでもない、勿論
、硼素イオン注入をはじめ上記した種々のイオン注入を
行なうに際してはチャネリング現象管抑制しなければな
らない・尚、上記実施例では、シリコン基体中に硼素イ
オン注入層を形成した後に選ばれた他のイオンの注入層
を前記硼素イオン注入層に重畳せしめて形成したが、こ
れらの形成順序は逆でも良い。Alternatively, these may be used in combination. When using these ionized rice, the injection energy and injection amount (approximately 5 x 1014 particles/
Of course, when performing the various ion implantations mentioned above, including boron ion implantation, the channeling phenomenon must be suppressed. In the above embodiment, the silicon substrate After forming a boron ion implanted layer therein, a selected ion implanted layer was formed to overlap the boron ion implanted layer, but the order of formation may be reversed.
又実施例ではシリコン基体に其侭イオン注入を行なった
がシリコン基体上に酸化膜や窒化膜を設けた後に行なっ
ても良い。また本発明の方法は、単結晶シリコン基体は
勿論Ｓｏｌ （５ｉｌｉｃｏｎ−Ｏｎ −Ｉｎ５ｕｌａ
ｔｏｒ ）基板上にＭＯ８累子電子？イポの結晶性は単
結晶、非単結晶を問わない。Further, in the embodiment, the ion implantation was performed on the silicon substrate, but it may be performed after forming an oxide film or a nitride film on the silicon substrate. In addition, the method of the present invention can be applied not only to single crystal silicon substrates but also to Sol (5ilicon-On-In5ula
tor) MO8 electrons on the substrate? The crystallinity of IPO does not matter whether it is single crystal or non-single crystal.
第１図および第２図は本発明の詳細な説明するための注
入イオン濃度分布を示す図、第３図は本発明の詳細な説
明するための注入イオン濃度分布を示す図、第４図は同
じくＢ＋注入層抵抗値と重畳イオン注入量の関係管示す
図である。
出願人代理人 弁理士 鈴 江 武 彦第１図
第２図
第３図 第４図1 and 2 are diagrams showing the implanted ion concentration distribution for explaining the present invention in detail, FIG. 3 is a diagram showing the implanted ion concentration distribution for explaining the present invention in detail, and FIG. FIG. 3 is a diagram showing the relationship between the resistance value of the B+ implanted layer and the amount of superimposed ion implantation. Applicant's agent Patent attorney Takehiko Suzue Figure 1
Figure 2 Figure 3 Figure 4
Claims (3)
れるｉｌのイオン注入層と硼素イオンよシも質量数が大
きく且つ該基体の導電型に影響を与えないイオンを注入
して得られる第２のイオン注入層と管形成し、９００℃
以下の温度で熱、処理先して第１のイオン注入層管活性
化する方法において、前記第１および第２のイオン注入
層ｔ、その濃度分布の極大値、の位置を略合致させ且つ
その極太値の位置よ）深部での第２のイオン注入層の濃
度分布の広が９が第１のイオン注入層の濃度分布の広が
シを越えない様に重畳せしめて形成することｔ−特徴と
するシリコン中の硼素イオン注入層の低温活性化方法。(1) An ion-implanted layer of IL obtained by implanting boron ions into a silicon substrate and a second layer obtained by implanting ions which have a larger mass number than boron ions and do not affect the conductivity type of the substrate. Form a tube with an ion-implanted layer of 900°C.
In the method of activating the first ion-implanted layer tube by heat treatment at the following temperature, the positions of the first and second ion-implanted layers t and the maximum value of their concentration distribution are made to substantially coincide with each other; t-Characteristics A low-temperature activation method for a boron ion-implanted layer in silicon.
個／創３以上である特許請求の範囲第１項記載のシリコ
ン中の硼素イオン注入層の低温活性化方法。(2) [The implantation amount of the ion implantation layer in step 2 is '5 x 10''
A method for low temperature activation of a boron ion implanted layer in silicon according to claim 1, wherein the number of defects is 3 or more.
ま九はｒルマニウムである特許請求の(3) The ion species of the second ion implantation layer is silicon, and the ion species of the second ion implantation layer is rumanium.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15514881A JPS5856417A (en) | 1981-09-30 | 1981-09-30 | Low-temperature activating method for boron ion implanted layer in silicon |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15514881A JPS5856417A (en) | 1981-09-30 | 1981-09-30 | Low-temperature activating method for boron ion implanted layer in silicon |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5856417A true JPS5856417A (en) | 1983-04-04 |
| JPH0334649B2 JPH0334649B2 (en) | 1991-05-23 |
Family
ID=15599580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15514881A Granted JPS5856417A (en) | 1981-09-30 | 1981-09-30 | Low-temperature activating method for boron ion implanted layer in silicon |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5856417A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1985000694A1 (en) * | 1983-07-25 | 1985-02-14 | American Telephone & Telegraph Company | Shallow-junction semiconductor devices |
| JPS63169057A (en) * | 1985-12-27 | 1988-07-13 | ビユル エス． アー． | Method of forming electric resistor by doping semiconductor material and integrated circuit manufactured by the method |
| US4968635A (en) * | 1987-09-18 | 1990-11-06 | Kabushiki Kasiha Toshiba | Method of forming emitter of a bipolar transistor in monocrystallized film |
| JPH04225520A (en) * | 1990-12-27 | 1992-08-14 | Shimadzu Corp | Method of suppressing silicon crystal defect caused by ion implantation |
| US5298434A (en) * | 1992-02-07 | 1994-03-29 | Harris Corporation | Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits |
| JPH07142421A (en) * | 1993-11-22 | 1995-06-02 | Nec Corp | Method and equipment for forming shallow junction in semiconductor device |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4673355B2 (en) | 2007-10-30 | 2011-04-20 | Ｔｍｔマシナリー株式会社 | Confounding device |
-
1981
- 1981-09-30 JP JP15514881A patent/JPS5856417A/en active Granted
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1985000694A1 (en) * | 1983-07-25 | 1985-02-14 | American Telephone & Telegraph Company | Shallow-junction semiconductor devices |
| JPS63169057A (en) * | 1985-12-27 | 1988-07-13 | ビユル エス． アー． | Method of forming electric resistor by doping semiconductor material and integrated circuit manufactured by the method |
| JPH0558672B2 (en) * | 1985-12-27 | 1993-08-27 | Bull Sa | |
| US4968635A (en) * | 1987-09-18 | 1990-11-06 | Kabushiki Kasiha Toshiba | Method of forming emitter of a bipolar transistor in monocrystallized film |
| JPH04225520A (en) * | 1990-12-27 | 1992-08-14 | Shimadzu Corp | Method of suppressing silicon crystal defect caused by ion implantation |
| US5298434A (en) * | 1992-02-07 | 1994-03-29 | Harris Corporation | Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits |
| JPH07142421A (en) * | 1993-11-22 | 1995-06-02 | Nec Corp | Method and equipment for forming shallow junction in semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0334649B2 (en) | 1991-05-23 |
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