JPS58501556A - 相互接続マトリクスを備えるディジタル・デバイス - Google Patents
相互接続マトリクスを備えるディジタル・デバイスInfo
- Publication number
- JPS58501556A JPS58501556A JP56503106A JP50310681A JPS58501556A JP S58501556 A JPS58501556 A JP S58501556A JP 56503106 A JP56503106 A JP 56503106A JP 50310681 A JP50310681 A JP 50310681A JP S58501556 A JPS58501556 A JP S58501556A
- Authority
- JP
- Japan
- Prior art keywords
- bus
- sets
- electrical contacts
- input
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
- G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
- G06F15/7821—Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Logic Circuits (AREA)
- Executing Machine-Instructions (AREA)
- Small-Scale Networks (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/162,057 US4327355A (en) | 1980-06-23 | 1980-06-23 | Digital device with interconnect matrix |
| PCT/GB1981/000208 WO1983001325A1 (en) | 1980-06-23 | 1981-09-29 | Digital device with interconnect matrix |
| EP81304488A EP0075623B1 (en) | 1980-06-23 | 1981-09-29 | Digital device with interconnect matrix |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1345090A Division JPH0715660B2 (ja) | 1989-12-28 | 1989-12-28 | プログラム可能な相互接続マトリクス |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58501556A true JPS58501556A (ja) | 1983-09-16 |
| JPH0259490B2 JPH0259490B2 (enExample) | 1990-12-12 |
Family
ID=27225355
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56503106A Granted JPS58501556A (ja) | 1980-06-23 | 1981-09-29 | 相互接続マトリクスを備えるディジタル・デバイス |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4327355A (enExample) |
| EP (1) | EP0075623B1 (enExample) |
| JP (1) | JPS58501556A (enExample) |
| WO (1) | WO1983001325A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06131155A (ja) * | 1991-01-29 | 1994-05-13 | Analogic Corp | 再構成可能な順次処理装置 |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2137839B (en) * | 1983-04-09 | 1986-06-04 | Schlumberger Measurement | Digital signal processors |
| US4748580A (en) * | 1985-08-30 | 1988-05-31 | Advanced Micro Devices, Inc. | Multi-precision fixed/floating-point processor |
| GB2188175B (en) * | 1986-03-18 | 1990-02-07 | Stc Plc | Data processing arrangement |
| US5367208A (en) * | 1986-09-19 | 1994-11-22 | Actel Corporation | Reconfigurable programmable interconnect architecture |
| JPH0296963A (ja) * | 1988-10-03 | 1990-04-09 | Hitachi Ltd | 半導体集積回路装置 |
| US5400262A (en) * | 1989-09-20 | 1995-03-21 | Aptix Corporation | Universal interconnect matrix array |
| US5377124A (en) * | 1989-09-20 | 1994-12-27 | Aptix Corporation | Field programmable printed circuit board |
| EP0481703B1 (en) * | 1990-10-15 | 2003-09-17 | Aptix Corporation | Interconnect substrate having integrated circuit for programmable interconnection and sample testing |
| EP0518701A3 (en) * | 1991-06-14 | 1993-04-21 | Aptix Corporation | Field programmable circuit module |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4153943A (en) * | 1977-08-12 | 1979-05-08 | Honeywell Inc. | High speed I/O for content addressable type memories |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2522984C2 (de) * | 1975-05-23 | 1983-06-01 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Elektronischer Koppelpunktbaustein |
| DE2606958A1 (de) * | 1976-02-20 | 1977-08-25 | Siemens Ag | Bausteinschaltung mit speichertransistoren |
| US4153950A (en) * | 1978-07-21 | 1979-05-08 | International Business Machines Corp. | Data bit assembler |
| US4354228A (en) * | 1979-12-20 | 1982-10-12 | International Business Machines Corporation | Flexible processor on a single semiconductor substrate using a plurality of arrays |
-
1980
- 1980-06-23 US US06/162,057 patent/US4327355A/en not_active Expired - Lifetime
-
1981
- 1981-09-29 JP JP56503106A patent/JPS58501556A/ja active Granted
- 1981-09-29 WO PCT/GB1981/000208 patent/WO1983001325A1/en not_active Ceased
- 1981-09-29 EP EP81304488A patent/EP0075623B1/en not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4153943A (en) * | 1977-08-12 | 1979-05-08 | Honeywell Inc. | High speed I/O for content addressable type memories |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06131155A (ja) * | 1991-01-29 | 1994-05-13 | Analogic Corp | 再構成可能な順次処理装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0075623A1 (en) | 1983-04-06 |
| WO1983001325A1 (en) | 1983-04-14 |
| JPH0259490B2 (enExample) | 1990-12-12 |
| US4327355A (en) | 1982-04-27 |
| EP0075623B1 (en) | 1986-08-13 |
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