JPH0259490B2 - - Google Patents

Info

Publication number
JPH0259490B2
JPH0259490B2 JP56503106A JP50310681A JPH0259490B2 JP H0259490 B2 JPH0259490 B2 JP H0259490B2 JP 56503106 A JP56503106 A JP 56503106A JP 50310681 A JP50310681 A JP 50310681A JP H0259490 B2 JPH0259490 B2 JP H0259490B2
Authority
JP
Japan
Prior art keywords
input
bus
output
buses
contacts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56503106A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58501556A (ja
Inventor
Meru Jentaa
Hanan Hotashu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Unisys Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisys Corp filed Critical Unisys Corp
Publication of JPS58501556A publication Critical patent/JPS58501556A/ja
Publication of JPH0259490B2 publication Critical patent/JPH0259490B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821—Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Executing Machine-Instructions (AREA)
  • Small-Scale Networks (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP56503106A 1980-06-23 1981-09-29 相互接続マトリクスを備えるディジタル・デバイス Granted JPS58501556A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US06/162,057 US4327355A (en) 1980-06-23 1980-06-23 Digital device with interconnect matrix
PCT/GB1981/000208 WO1983001325A1 (en) 1980-06-23 1981-09-29 Digital device with interconnect matrix
EP81304488A EP0075623B1 (en) 1980-06-23 1981-09-29 Digital device with interconnect matrix

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP1345090A Division JPH0715660B2 (ja) 1989-12-28 1989-12-28 プログラム可能な相互接続マトリクス

Publications (2)

Publication Number Publication Date
JPS58501556A JPS58501556A (ja) 1983-09-16
JPH0259490B2 true JPH0259490B2 (enExample) 1990-12-12

Family

ID=27225355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56503106A Granted JPS58501556A (ja) 1980-06-23 1981-09-29 相互接続マトリクスを備えるディジタル・デバイス

Country Status (4)

Country Link
US (1) US4327355A (enExample)
EP (1) EP0075623B1 (enExample)
JP (1) JPS58501556A (enExample)
WO (1) WO1983001325A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2137839B (en) * 1983-04-09 1986-06-04 Schlumberger Measurement Digital signal processors
US4748580A (en) * 1985-08-30 1988-05-31 Advanced Micro Devices, Inc. Multi-precision fixed/floating-point processor
GB2188175B (en) * 1986-03-18 1990-02-07 Stc Plc Data processing arrangement
US5367208A (en) * 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
JPH0296963A (ja) * 1988-10-03 1990-04-09 Hitachi Ltd 半導体集積回路装置
US5400262A (en) * 1989-09-20 1995-03-21 Aptix Corporation Universal interconnect matrix array
US5377124A (en) * 1989-09-20 1994-12-27 Aptix Corporation Field programmable printed circuit board
EP0481703B1 (en) * 1990-10-15 2003-09-17 Aptix Corporation Interconnect substrate having integrated circuit for programmable interconnection and sample testing
US5301344A (en) * 1991-01-29 1994-04-05 Analogic Corporation Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets
EP0518701A3 (en) * 1991-06-14 1993-04-21 Aptix Corporation Field programmable circuit module

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2522984C2 (de) * 1975-05-23 1983-06-01 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Elektronischer Koppelpunktbaustein
DE2606958A1 (de) * 1976-02-20 1977-08-25 Siemens Ag Bausteinschaltung mit speichertransistoren
US4153943A (en) * 1977-08-12 1979-05-08 Honeywell Inc. High speed I/O for content addressable type memories
US4153950A (en) * 1978-07-21 1979-05-08 International Business Machines Corp. Data bit assembler
US4354228A (en) * 1979-12-20 1982-10-12 International Business Machines Corporation Flexible processor on a single semiconductor substrate using a plurality of arrays

Also Published As

Publication number Publication date
EP0075623A1 (en) 1983-04-06
JPS58501556A (ja) 1983-09-16
WO1983001325A1 (en) 1983-04-14
US4327355A (en) 1982-04-27
EP0075623B1 (en) 1986-08-13

Similar Documents

Publication Publication Date Title
Dally et al. The torus routing chip
Harata et al. A high-speed multiplier using a redundant binary adder tree
US3924144A (en) Method for testing logic chips and logic chips adapted therefor
US4635261A (en) On chip test system for configurable gate arrays
US6029220A (en) Pipelined semiconductor devices suitable for ultra large scale integration
US4884192A (en) Information processor capable of data transfer among plural digital data processing units by using an active transmission line having locally controlled storage of data
JPH07107916B2 (ja) 超大規模集積回路
JPH07175719A (ja) ワード長をプログラム可能なメモリ
JPH0259490B2 (enExample)
US3858183A (en) Data processing system and method therefor
JPH10233676A (ja) 論理アレイブロック内でローカル相互接続ラインを配列する方法およびプログラマブル論理回路
US5633806A (en) Semiconductor integrated circuit and method of designing same
US20030034544A1 (en) Microcomputer
EP0194205B1 (en) A method for fabricating a 1-chip microcomputer
WO1982002783A1 (en) Stored-program control machine
EP0079127A1 (en) Programmable system component
JPS6039241A (ja) デイジタル演算ユニツト
US5577215A (en) Data transmission circuit for digital signal processor chip and method therefor
JPH0715660B2 (ja) プログラム可能な相互接続マトリクス
US4843383A (en) Transistor matrix shifter
Patil et al. An approach to using VLSI in digital systems
EP1014259A1 (en) A multi-functional arithmetic apparatus with multi value-states
Kondo et al. A large scale cellular array processor: AAP-1
JPH0719478B2 (ja) 半導体メモリ
JP2002305439A (ja) プログラマブル論理回路および半導体装置