JPS5842259A - 半導体パッケージの製造方法 - Google Patents

半導体パッケージの製造方法

Info

Publication number
JPS5842259A
JPS5842259A JP56139479A JP13947981A JPS5842259A JP S5842259 A JPS5842259 A JP S5842259A JP 56139479 A JP56139479 A JP 56139479A JP 13947981 A JP13947981 A JP 13947981A JP S5842259 A JPS5842259 A JP S5842259A
Authority
JP
Japan
Prior art keywords
chip
metal frames
metal
wires
insulating material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56139479A
Other languages
English (en)
Japanese (ja)
Other versions
JPH022289B2 (cg-RX-API-DMAC10.html
Inventor
Nobuhiko Mizuo
水尾 允彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56139479A priority Critical patent/JPS5842259A/ja
Publication of JPS5842259A publication Critical patent/JPS5842259A/ja
Publication of JPH022289B2 publication Critical patent/JPH022289B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W72/90
    • H10W72/075
    • H10W72/07554
    • H10W72/5449
    • H10W72/547
    • H10W72/884
    • H10W72/932
    • H10W90/754

Landscapes

  • Wire Bonding (AREA)
JP56139479A 1981-09-04 1981-09-04 半導体パッケージの製造方法 Granted JPS5842259A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56139479A JPS5842259A (ja) 1981-09-04 1981-09-04 半導体パッケージの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56139479A JPS5842259A (ja) 1981-09-04 1981-09-04 半導体パッケージの製造方法

Publications (2)

Publication Number Publication Date
JPS5842259A true JPS5842259A (ja) 1983-03-11
JPH022289B2 JPH022289B2 (cg-RX-API-DMAC10.html) 1990-01-17

Family

ID=15246203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56139479A Granted JPS5842259A (ja) 1981-09-04 1981-09-04 半導体パッケージの製造方法

Country Status (1)

Country Link
JP (1) JPS5842259A (cg-RX-API-DMAC10.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62106635A (ja) * 1985-11-01 1987-05-18 Mitsubishi Electric Corp 半導体装置
US5093282A (en) * 1988-04-13 1992-03-03 Kabushiki Kaisha Toshiba Method of making a semiconductor device having lead pins and a metal shell
JPH0489926U (cg-RX-API-DMAC10.html) * 1990-02-14 1992-08-05

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5638846A (en) * 1979-09-07 1981-04-14 Fujitsu Ltd Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5638846A (en) * 1979-09-07 1981-04-14 Fujitsu Ltd Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62106635A (ja) * 1985-11-01 1987-05-18 Mitsubishi Electric Corp 半導体装置
US5093282A (en) * 1988-04-13 1992-03-03 Kabushiki Kaisha Toshiba Method of making a semiconductor device having lead pins and a metal shell
JPH0489926U (cg-RX-API-DMAC10.html) * 1990-02-14 1992-08-05

Also Published As

Publication number Publication date
JPH022289B2 (cg-RX-API-DMAC10.html) 1990-01-17

Similar Documents

Publication Publication Date Title
CA1043189A (en) Fabrication techniques for multilayer ceramic modules
EP0073149B1 (en) Semiconductor chip mounting module
JPS5940560A (ja) 多層回路装置
EP0997941B1 (en) Conductive paste and ceramic printed circuit substrate using the same
JPS5842259A (ja) 半導体パッケージの製造方法
US5292624A (en) Method for forming a metallurgical interconnection layer package for a multilayer ceramic substrate
JPH10145027A (ja) 電子回路パッケージおよびプリント配線板並びに実装方法
JP3404266B2 (ja) 配線基板の接続構造
JP2545964B2 (ja) 磁気抵抗効果素子
JPS6153852B2 (cg-RX-API-DMAC10.html)
JP2652222B2 (ja) 電子部品搭載用基板
JP3270803B2 (ja) 配線基板
JPS63111697A (ja) 配線基板およびその製造方法
JPS58134450A (ja) 半導体装置およびその製造方法
JPS58130590A (ja) セラミツク配線基板および該セラミツク配線基板を用いた厚膜ハイブリツドic
JPH0353793B2 (cg-RX-API-DMAC10.html)
JPH02105595A (ja) 混成集積回路
JPS6235552A (ja) 半導体搭載装置の製造方法
JPS6094794A (ja) 多層配線基板
Mcdonald Micropackaging of electronic circuits
JPS6384096A (ja) 回路基板
JPH03148894A (ja) 混成集積回路
JPS6286847A (ja) チツプキヤリア
JPH01140695A (ja) 電子回路部品の製造方法
JPH02278892A (ja) 厚膜回路構成体