JPS58202550A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS58202550A
JPS58202550A JP8476382A JP8476382A JPS58202550A JP S58202550 A JPS58202550 A JP S58202550A JP 8476382 A JP8476382 A JP 8476382A JP 8476382 A JP8476382 A JP 8476382A JP S58202550 A JPS58202550 A JP S58202550A
Authority
JP
Japan
Prior art keywords
film
diffusion layer
electrode
insulating film
contact hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8476382A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0576186B2 (https=
Inventor
Hideo Sunami
英夫 角南
Tokuo Kure
久礼　得男
Yoshifumi Kawamoto
川本　佳史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8476382A priority Critical patent/JPS58202550A/ja
Publication of JPS58202550A publication Critical patent/JPS58202550A/ja
Publication of JPH0576186B2 publication Critical patent/JPH0576186B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP8476382A 1982-05-21 1982-05-21 半導体装置の製造方法 Granted JPS58202550A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8476382A JPS58202550A (ja) 1982-05-21 1982-05-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8476382A JPS58202550A (ja) 1982-05-21 1982-05-21 半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP12670990A Division JPH0316124A (ja) 1990-05-18 1990-05-18 半導体装置

Publications (2)

Publication Number Publication Date
JPS58202550A true JPS58202550A (ja) 1983-11-25
JPH0576186B2 JPH0576186B2 (https=) 1993-10-22

Family

ID=13839715

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8476382A Granted JPS58202550A (ja) 1982-05-21 1982-05-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58202550A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5270256A (en) * 1991-11-27 1993-12-14 Intel Corporation Method of forming a guard wall to reduce delamination effects

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52129279A (en) * 1976-04-22 1977-10-29 Fujitsu Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52129279A (en) * 1976-04-22 1977-10-29 Fujitsu Ltd Production of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5270256A (en) * 1991-11-27 1993-12-14 Intel Corporation Method of forming a guard wall to reduce delamination effects
US5986315A (en) * 1991-11-27 1999-11-16 Intel Corporation Guard wall to reduce delamination effects within a semiconductor die

Also Published As

Publication number Publication date
JPH0576186B2 (https=) 1993-10-22

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