JPS58199541A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS58199541A
JPS58199541A JP57081515A JP8151582A JPS58199541A JP S58199541 A JPS58199541 A JP S58199541A JP 57081515 A JP57081515 A JP 57081515A JP 8151582 A JP8151582 A JP 8151582A JP S58199541 A JPS58199541 A JP S58199541A
Authority
JP
Japan
Prior art keywords
layer
substrate
dicing region
main surface
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57081515A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0365014B2 (enExample
Inventor
Seiji Yasuda
聖治 安田
Toshio Yonezawa
敏夫 米沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57081515A priority Critical patent/JPS58199541A/ja
Publication of JPS58199541A publication Critical patent/JPS58199541A/ja
Publication of JPH0365014B2 publication Critical patent/JPH0365014B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049Nitrides composed of metals from groups of the periodic table
    • H01L2924/050414th Group
    • H01L2924/05042Si3N4

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Dicing (AREA)
JP57081515A 1982-05-17 1982-05-17 半導体装置の製造方法 Granted JPS58199541A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57081515A JPS58199541A (ja) 1982-05-17 1982-05-17 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57081515A JPS58199541A (ja) 1982-05-17 1982-05-17 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58199541A true JPS58199541A (ja) 1983-11-19
JPH0365014B2 JPH0365014B2 (enExample) 1991-10-09

Family

ID=13748478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57081515A Granted JPS58199541A (ja) 1982-05-17 1982-05-17 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58199541A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023055018A (ja) * 2021-10-05 2023-04-17 新電元工業株式会社 半導体装置及びその製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5019364U (enExample) * 1973-06-15 1975-03-04

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5019364U (enExample) * 1973-06-15 1975-03-04

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023055018A (ja) * 2021-10-05 2023-04-17 新電元工業株式会社 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JPH0365014B2 (enExample) 1991-10-09

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