JPS5819795A - メモリ出力読取回路 - Google Patents

メモリ出力読取回路

Info

Publication number
JPS5819795A
JPS5819795A JP56118742A JP11874281A JPS5819795A JP S5819795 A JPS5819795 A JP S5819795A JP 56118742 A JP56118742 A JP 56118742A JP 11874281 A JP11874281 A JP 11874281A JP S5819795 A JPS5819795 A JP S5819795A
Authority
JP
Japan
Prior art keywords
level
data
output
memory
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56118742A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6325437B2 (enrdf_load_stackoverflow
Inventor
Akira Suzuki
明 鈴木
Hitoshi Matsuda
均 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56118742A priority Critical patent/JPS5819795A/ja
Publication of JPS5819795A publication Critical patent/JPS5819795A/ja
Publication of JPS6325437B2 publication Critical patent/JPS6325437B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits

Landscapes

  • Read Only Memory (AREA)
JP56118742A 1981-07-29 1981-07-29 メモリ出力読取回路 Granted JPS5819795A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56118742A JPS5819795A (ja) 1981-07-29 1981-07-29 メモリ出力読取回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56118742A JPS5819795A (ja) 1981-07-29 1981-07-29 メモリ出力読取回路

Publications (2)

Publication Number Publication Date
JPS5819795A true JPS5819795A (ja) 1983-02-04
JPS6325437B2 JPS6325437B2 (enrdf_load_stackoverflow) 1988-05-25

Family

ID=14743933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56118742A Granted JPS5819795A (ja) 1981-07-29 1981-07-29 メモリ出力読取回路

Country Status (1)

Country Link
JP (1) JPS5819795A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677590A (en) * 1981-12-29 1987-06-30 Fujitsu Limited Nonvolatile semiconductor memory circuit including dummy sense amplifiers
KR100309523B1 (ko) * 1997-06-30 2001-12-17 가네꼬 히사시 반도체기억장치

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677590A (en) * 1981-12-29 1987-06-30 Fujitsu Limited Nonvolatile semiconductor memory circuit including dummy sense amplifiers
KR100309523B1 (ko) * 1997-06-30 2001-12-17 가네꼬 히사시 반도체기억장치

Also Published As

Publication number Publication date
JPS6325437B2 (enrdf_load_stackoverflow) 1988-05-25

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