JPS58155841U - Icパツケ−ジ - Google Patents
Icパツケ−ジInfo
- Publication number
- JPS58155841U JPS58155841U JP1982051890U JP5189082U JPS58155841U JP S58155841 U JPS58155841 U JP S58155841U JP 1982051890 U JP1982051890 U JP 1982051890U JP 5189082 U JP5189082 U JP 5189082U JP S58155841 U JPS58155841 U JP S58155841U
- Authority
- JP
- Japan
- Prior art keywords
- package
- solder
- align
- cap
- assembled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Joining Of Glass To Other Materials (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は本考案の一実施例の断面図、第2図は本考案の
他の実施例の断面図である。 2、 5. 8・・・段差部。
他の実施例の断面図である。 2、 5. 8・・・段差部。
Claims (1)
- ハンダまたは低融点ガラスを封止材として使用する半導
体集積回路のパッケージングにおいて、ベースおよびキ
ャップの両者に、組合せた時に整合する段差部を設けた
ことを特徴とするICパッケージ。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1982051890U JPS58155841U (ja) | 1982-04-12 | 1982-04-12 | Icパツケ−ジ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1982051890U JPS58155841U (ja) | 1982-04-12 | 1982-04-12 | Icパツケ−ジ |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58155841U true JPS58155841U (ja) | 1983-10-18 |
Family
ID=30062601
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1982051890U Pending JPS58155841U (ja) | 1982-04-12 | 1982-04-12 | Icパツケ−ジ |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58155841U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006054304A (ja) * | 2004-08-11 | 2006-02-23 | Sanyo Electric Co Ltd | セラミックパッケージ、集合基板及びその製造方法 |
-
1982
- 1982-04-12 JP JP1982051890U patent/JPS58155841U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006054304A (ja) * | 2004-08-11 | 2006-02-23 | Sanyo Electric Co Ltd | セラミックパッケージ、集合基板及びその製造方法 |
JP4511278B2 (ja) * | 2004-08-11 | 2010-07-28 | 三洋電機株式会社 | セラミックパッケージ |
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