JPS58147172A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the rise and fall switching charateristics of a semiconductor device by heat treating at the temperature which sufficiently produces a distribution that carrier density between AlGaAs layers stepwisely varies in the carrier density from the result that ions in the GaAs layer are sufficiently activated. CONSTITUTION:A non-doped GaAs layer 2 and a non-doped AlGaAs layer 3 are grown on a non-doped AlGaAs layer 1, and when Si ions are implanted to the layer, a distribution characteristic curve PF in which solid line and broken lines exist is obtained. The curve PF is energy and dosage at ion implanting time, which is decited unitarily. When an annealing is performed at a temperature of 700 deg.C in case of activating it after implanting Si ions, the carrier distribution is presented only in the layer 2 as seen by the solid line of the curve PF, thereby providing an ideal profile.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having characteristics of steep rise and/or fall.

Prior Art and Problems Conventionally, in some types of semiconductor devices, a channel region is formed by introducing impurities into a semiconductor substrate (or layer) using an ion implantation method.

Generally, when a channel region is formed as described above,
It is known that the carrier distribution is a so-called Gaussian distribution as shown in Fig. 1. In a semiconductor device having a channel region with such a carrier distribution, the The drain current changes slowly with respect to the gate voltage, and the rise or fall is extremely slow.The reason for this is that the carrier distribution has a gentle tail, as can be seen from Figure 1.
There are two reasons. That is, fya is high in the part indicated by arrow A, but fig in the part indicated by arrow B (=) is low.

Purpose of the Invention The present invention aims to improve the rise and fall switching characteristics of a semiconductor device so that the carrier distribution has a steep step difference when a channel region is formed by ion implantation. be.

Embodiment of the Invention FIG. 2 is a diagram showing carrier distribution for explaining an embodiment of the invention.

As seen in the figure C ninone dope A IG a A J
F layer 1 top 1: Noy-doped Ga A 7 layer 2. noy'
When doped A I G a A z113 is grown and Si ions are implanted, a distribution characteristic line PF including solid lines and broken lines is obtained. This characteristic line PF is uniquely determined by the energy and dose during ion implantation.

Now, even if 4:Si ions are implanted as described above, they cannot act as carriers unless they are activated by heat treatment. Therefore, after ion implantation, annealing is performed, and the ions in AIGcAs are heated to a temperature of 800
It will not become a donor unless it is heated to a level above ('C). This (2), whereas the ion in GaAs is 700 ("C
) At a temperature above about 100%, donor C becomes.

Therefore, as mentioned above (2. A I G aA z and G
To form a heterojunction of a A p, it is optional whether to make one or two heterojunctions), and then activate it after implanting (for example, Si ions). 700 ('C) ≦ 2, the carrier distribution appears only in the GaAz layer 2, as can be seen from the solid line of the characteristic line PF in Figure C2, and becomes an ideal profile. Even if the temperature exceeds 700 ('C), only a small amount of carriers are generated in A I G g A JF. It will be. No way, 8
Even if annealed at 00('C), A I G g A J
Because the inner donor unit is deep (60 [semi-V] for Si),
Even at 300 [@K], the carrier concentration is 1/10.77 ('
K) completely (=freezes).

By applying the principles of the present invention described above, a semiconductor device having good switching characteristics can be manufactured.

FIG. 5 is a sectional view of a main part of a Schottky gate electrode type field effect semiconductor device jii (MESFET) obtained by applying the present invention.

In Figure 1, 1 is a semi-insulating G a A J substrate, 2 is a buffer layer, S is an A I G a A 7 layer, 4 is an electric type G11A# layer, 5 is an A I G g A a layer, Reference numeral 6 indicates a source electrode, 7 indicates a drain electrode, and 8 indicates a gate electrode.

In this example, 94. The GaAz layer 4 is electrically typed (to which the present invention is applied).
operates as a channel, and is controlled by a depletion layer (which is generated by applying voltage to the gate electrode 8).

Figure 4 shows high electron mobility semiconductor device (HEMT: magazine
Electronic Technology” No. 224 No. 12, pages 85 to 90 N
) is a sectional view of a main part of a device to which the present invention is applied, and the same parts as those described in connection with FIG. 3 are indicated by the same symbols.

In the figure, 9 is the non-doped AlGmAg layer, 10 is the %fJIG@A # channel layer, and 11 is the s fji
AIGtAz electron supply layers are shown respectively.

In a pure HEMT, the channel layer 10 is non-doped, and a high-mobility electron layer is formed by electrons transitioning from the electron supply layer 11. However, in recent years, the channel layer 10 is
C: A technology to introduce depletion type impurities has been developed, and this transistor is combined with an original HEMT whose channel is not doped to form an E/D inverter. , this II (= is effective when the present invention is applied to shape the channel layer 10.

Note that the electron supply layer 11 may be doped during epitaxial growth.

Effects of the Invention According to the present invention (=according to the invention, A I G a A is a layer and G g
The Gt layer is formed adjacent to the Az layer, and the Gt
Generate sufficient carriers only in the tAz layer and G g A
Since it is possible to extract carrier distribution between the a layer and the AIGcAI layer (which changes in two steps), if this technology is applied to manufacture semiconductor devices such as MPJFETs and HEMTs, good switching characteristics can be obtained. .

[Brief explanation of the drawing]

FIG. 1 is a diagram illustrating carrier distribution, FIG. 2 is a diagram illustrating carriers when the present invention is implemented, and FIGS. 6 and 4 are outline diagrams of a semiconductor device obtained by implementing the present invention. FIG. In the figure, 1 is a semi-insulating GlIA# substrate, 2 is a buffer layer, 5 is an A IG a A 1 layer, and 4 is a calculation type GgAz
@. 5 is A IG a A # bit, 6 is source electrode, 7 is drain electrode, 8 is gate bridge, 9 is non-doped AIG
gAz layer, 10 is s tJI GgAz channel layer, 1
1 is a permeable AlGa electron supply layer. Patent applicant Fujitsu Ltd. agent Patent attorney Gobe Tamamushi (3 others) Distance from the surface 369- Figure 3 Figure 4

Claims (1)

[Claims] The A I G g A 7 layer and the G g A 7 layer are formed adjacent to each other, and then donor impurity ions are implanted into those layers. A method for manufacturing a semiconductor device, comprising the step of performing heat treatment at a temperature that activates and reveals a distribution in which the carrier concentration between the A I G g A z layer changes in a stepwise manner.