JPS58129630A - 入出力制御装置 - Google Patents

入出力制御装置

Info

Publication number
JPS58129630A
JPS58129630A JP1349082A JP1349082A JPS58129630A JP S58129630 A JPS58129630 A JP S58129630A JP 1349082 A JP1349082 A JP 1349082A JP 1349082 A JP1349082 A JP 1349082A JP S58129630 A JPS58129630 A JP S58129630A
Authority
JP
Japan
Prior art keywords
input
output
queue
channel
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1349082A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62543B2 (enrdf_load_stackoverflow
Inventor
Yoshihisa Shibata
柴田　義久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1349082A priority Critical patent/JPS58129630A/ja
Publication of JPS58129630A publication Critical patent/JPS58129630A/ja
Publication of JPS62543B2 publication Critical patent/JPS62543B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP1349082A 1982-01-29 1982-01-29 入出力制御装置 Granted JPS58129630A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1349082A JPS58129630A (ja) 1982-01-29 1982-01-29 入出力制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1349082A JPS58129630A (ja) 1982-01-29 1982-01-29 入出力制御装置

Publications (2)

Publication Number Publication Date
JPS58129630A true JPS58129630A (ja) 1983-08-02
JPS62543B2 JPS62543B2 (enrdf_load_stackoverflow) 1987-01-08

Family

ID=11834552

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1349082A Granted JPS58129630A (ja) 1982-01-29 1982-01-29 入出力制御装置

Country Status (1)

Country Link
JP (1) JPS58129630A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS62543B2 (enrdf_load_stackoverflow) 1987-01-08

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