JPS581256A - メモリアクセス制御方式 - Google Patents
メモリアクセス制御方式Info
- Publication number
- JPS581256A JPS581256A JP56099269A JP9926981A JPS581256A JP S581256 A JPS581256 A JP S581256A JP 56099269 A JP56099269 A JP 56099269A JP 9926981 A JP9926981 A JP 9926981A JP S581256 A JPS581256 A JP S581256A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- data
- read
- flag
- control unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
- G06F12/0855—Overlapped cache accessing, e.g. pipeline
- G06F12/0859—Overlapped cache accessing, e.g. pipeline with reload from main memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56099269A JPS581256A (ja) | 1981-06-26 | 1981-06-26 | メモリアクセス制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56099269A JPS581256A (ja) | 1981-06-26 | 1981-06-26 | メモリアクセス制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS581256A true JPS581256A (ja) | 1983-01-06 |
| JPH035619B2 JPH035619B2 (cs) | 1991-01-28 |
Family
ID=14242962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56099269A Granted JPS581256A (ja) | 1981-06-26 | 1981-06-26 | メモリアクセス制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS581256A (cs) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61190435U (cs) * | 1985-05-21 | 1986-11-27 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55153024A (en) * | 1979-05-15 | 1980-11-28 | Toshiba Corp | Bus control system |
| JPS5671129A (en) * | 1979-11-15 | 1981-06-13 | Fujitsu Ltd | Data processing system |
-
1981
- 1981-06-26 JP JP56099269A patent/JPS581256A/ja active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55153024A (en) * | 1979-05-15 | 1980-11-28 | Toshiba Corp | Bus control system |
| JPS5671129A (en) * | 1979-11-15 | 1981-06-13 | Fujitsu Ltd | Data processing system |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61190435U (cs) * | 1985-05-21 | 1986-11-27 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH035619B2 (cs) | 1991-01-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR940005790B1 (ko) | Dma 기능을 갖춘 정보 처리장치 | |
| JP2766216B2 (ja) | 情報処理装置 | |
| JPS581256A (ja) | メモリアクセス制御方式 | |
| JPS59173828A (ja) | デ−タ処理システム | |
| JPH069036B2 (ja) | 入出力制御装置 | |
| JPS6130300B2 (cs) | ||
| JPH05250310A (ja) | データ処理装置 | |
| JP2501393B2 (ja) | 直接メモリアクセス装置 | |
| JP2594673B2 (ja) | データ処理方法 | |
| JP3442099B2 (ja) | データ転送記憶装置 | |
| JP2552025B2 (ja) | データ転送方式 | |
| SU1541623A1 (ru) | Устройство дл сопр жени ЭВМ с периферийным устройством | |
| JP2552015B2 (ja) | データ転送装置 | |
| JP3219422B2 (ja) | キャッシュメモリ制御方式 | |
| JPS6411984B2 (cs) | ||
| JPH07334453A (ja) | メモリアクセスシステム | |
| JPH01181144A (ja) | データ入出力装置 | |
| JPH01144151A (ja) | 情報処理装置 | |
| JPS6037933B2 (ja) | 電子計算機のメモリ・アクセス方式 | |
| JPH0795312B2 (ja) | リモ−トデイスプレイ端末制御方式 | |
| JPH02301851A (ja) | システムバスアクセス方式 | |
| JPH03256148A (ja) | キャッシュメモリ制御装置 | |
| JPS63281545A (ja) | シリアル・デ−タ伝送方法 | |
| JPS6240748B2 (cs) | ||
| JPH0334043A (ja) | システムバスを介してデータをやりとりする情報処理装置 |