JPS58124248A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS58124248A
JPS58124248A JP601682A JP601682A JPS58124248A JP S58124248 A JPS58124248 A JP S58124248A JP 601682 A JP601682 A JP 601682A JP 601682 A JP601682 A JP 601682A JP S58124248 A JPS58124248 A JP S58124248A
Authority
JP
Japan
Prior art keywords
glass
melting point
low melting
pellet
point glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP601682A
Other languages
English (en)
Other versions
JPS6347264B2 (ja
Inventor
Kazuo Horiuchi
和雄 堀内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP601682A priority Critical patent/JPS58124248A/ja
Publication of JPS58124248A publication Critical patent/JPS58124248A/ja
Publication of JPS6347264B2 publication Critical patent/JPS6347264B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8389—Bonding techniques using an inorganic non metallic glass type adhesive, e.g. solder glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/166—Material

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Glass Compositions (AREA)
  • Joining Of Glass To Other Materials (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は、セラミックをパッケージに使用する半導体装
置に係り、特にペレット接着用低融点ガラスを有するパ
ッケージの半導体装置に関する。
一般にサーディツプと称するセラミックパッケージ型の
半導体装置では、パッケージベース、リードフレーム及
びパッケージキャップを封止用低融点ガラスにて封止す
る一方、ペレットヲペレット接着用低融点ガラスにてベ
ースに固着する構成が採用されることがある。この場合
、従来では、前記した封止用低融点ガラスとペレット接
着用低融点ガラスの軟化点が同一のものを採用しており
、このためペレット接着時に温度が高すぎろと封止用低
融点ガラスがキャビティ内に流れ込み封止時にガラス不
足になって封止が不完全なものになる一方、温度か低す
ぎると、ペレットの接着が悪くペレットクラノク不良が
生じる等の欠点があった。
したがって、本発明の目的は、サーディツプ型パッケー
ジの構成において、封止用低融点ガラスより軟化点の低
いペレット接着用低融点ガラスを採用することによりペ
レットの接着性を良好にし高歩留で高品質の製品を得る
ことができる半導体装置を提供することにある。
以下、本発明の一実施例を第１図および第２図に基づい
て説明する。
図において、１はパッケージ本体、２はセラミックベー
スであり、その中央四部２ａの低面には半導体ペレット
３を固着する。周辺には、外部導出用の複数不のり一ド
４を整列配置して封止用低融点カラス６にて支持してい
る。これらのリード４には、前記半導体ペレット３との
藺にワイヤ８を接続して電気的接続を図っている。５は
、前記セラミックベースの上ｍｔ？ｐｉｉうようにして
固着するセラミックキャップであり周辺において前記封
止用低融点ガラス６にて固着し、これによりパッケージ
本体１を構成している。そして、前記半導体ペレットは
、ペレット接着用の低融点ガラス７にてセラミックベー
スに固着しており、このペレット接着用の低融点ガラス
７は、封圧用低融点ガラス６と興なり、封止用低融点ガ
ラス６より低い温度の軟化点を有するように構成してい
る。
この構成によれば、ペレット３をセラミックベース２に
固着する際にセラミックベースを加熱しても、これはペ
レット接着用の低融点ガラス７の軟化点まで加熱するの
みでよく、これによりこれよりも軟化点の高い封止用低
融点ガラス６が軟化することはない。
したがって、本発明によれば、ペレット３の固着時に、
封止用低融点ガラス６のキャビティ内への流れ込みを防
止でき、ペレット接着用低融点ガラス７の軟化性を良く
できることによりペレット固着が良好にでき、工程歩留
の向上及び品質の向上の効果がある。
【図面の簡単な説明】
第１図は本発明の半導体装置の上面図、第２図は第１図
の■−■線断面図である。 １・・・パンケージ本体、２・・・セラミックベース、
３・・・半導体ペレット、４・・・リード、５・・・セ
ラミックキャップ、６・・・封止用低融点ガラス、７・
・・ペレット付は用低融点ガラス、８・・・ワイヤ。

Claims (1)

  1. 【特許請求の範囲】 １、パッケージ本体のキャビティ内にペレット接着用低
    融点ガラスを有し、かつセラミックベース。 リードフレーム及びセラミックキャップを接着する封止
    用低融小ガラスを有する半導体装置において、前記封止
    用低融点ガラスよりもペレット接着用低融点ガラスの軟
    化点が低くなるよう構成したことを特徴とする半導体装
    置。
JP601682A 1982-01-20 1982-01-20 半導体装置 Granted JPS58124248A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP601682A JPS58124248A (ja) 1982-01-20 1982-01-20 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP601682A JPS58124248A (ja) 1982-01-20 1982-01-20 半導体装置

Publications (2)

Publication Number Publication Date
JPS58124248A true JPS58124248A (ja) 1983-07-23
JPS6347264B2 JPS6347264B2 (ja) 1988-09-21

Family

ID=11626897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP601682A Granted JPS58124248A (ja) 1982-01-20 1982-01-20 半導体装置

Country Status (1)

Country Link
JP (1) JPS58124248A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991007776A1 (en) * 1989-11-15 1991-05-30 Olin Corporation A method for housing a tape-bonded electronic device and the package employed
US5496619A (en) * 1992-05-14 1996-03-05 Matsushita Electric Industrial Co., Ltd. Assembly formed from conductive paste and insulating paste

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50110772A (ja) * 1974-02-08 1975-09-01
JPS5230352A (en) * 1975-09-04 1977-03-08 Nippon Telegr & Teleph Corp <Ntt> Micro program control method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50110772A (ja) * 1974-02-08 1975-09-01
JPS5230352A (en) * 1975-09-04 1977-03-08 Nippon Telegr & Teleph Corp <Ntt> Micro program control method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991007776A1 (en) * 1989-11-15 1991-05-30 Olin Corporation A method for housing a tape-bonded electronic device and the package employed
US5073521A (en) * 1989-11-15 1991-12-17 Olin Corporation Method for housing a tape-bonded electronic device and the package employed
US5496619A (en) * 1992-05-14 1996-03-05 Matsushita Electric Industrial Co., Ltd. Assembly formed from conductive paste and insulating paste

Also Published As

Publication number Publication date
JPS6347264B2 (ja) 1988-09-21

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