JPS58111450A - デ−タの標本化速度変換回路 - Google Patents

デ−タの標本化速度変換回路

Info

Publication number
JPS58111450A
JPS58111450A JP20798381A JP20798381A JPS58111450A JP S58111450 A JPS58111450 A JP S58111450A JP 20798381 A JP20798381 A JP 20798381A JP 20798381 A JP20798381 A JP 20798381A JP S58111450 A JPS58111450 A JP S58111450A
Authority
JP
Japan
Prior art keywords
circuit
data
input
rate conversion
sampling rate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20798381A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0117618B2 (enrdf_load_stackoverflow
Inventor
Kiichi Matsuda
松田　喜一
Takeshi Okazaki
健 岡崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20798381A priority Critical patent/JPS58111450A/ja
Publication of JPS58111450A publication Critical patent/JPS58111450A/ja
Publication of JPH0117618B2 publication Critical patent/JPH0117618B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Time-Division Multiplex Systems (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
JP20798381A 1981-12-24 1981-12-24 デ−タの標本化速度変換回路 Granted JPS58111450A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20798381A JPS58111450A (ja) 1981-12-24 1981-12-24 デ−タの標本化速度変換回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20798381A JPS58111450A (ja) 1981-12-24 1981-12-24 デ−タの標本化速度変換回路

Publications (2)

Publication Number Publication Date
JPS58111450A true JPS58111450A (ja) 1983-07-02
JPH0117618B2 JPH0117618B2 (enrdf_load_stackoverflow) 1989-03-31

Family

ID=16548731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20798381A Granted JPS58111450A (ja) 1981-12-24 1981-12-24 デ−タの標本化速度変換回路

Country Status (1)

Country Link
JP (1) JPS58111450A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60253311A (ja) * 1984-05-30 1985-12-14 Hitachi Ltd デイジタルフイルタ
US5020053A (en) * 1989-04-17 1991-05-28 Fujitsu Limited Channel access system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60253311A (ja) * 1984-05-30 1985-12-14 Hitachi Ltd デイジタルフイルタ
US5020053A (en) * 1989-04-17 1991-05-28 Fujitsu Limited Channel access system

Also Published As

Publication number Publication date
JPH0117618B2 (enrdf_load_stackoverflow) 1989-03-31

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