JPS5788781A - Light emitting device - Google Patents

Light emitting device

Info

Publication number
JPS5788781A
JPS5788781A JP16330180A JP16330180A JPS5788781A JP S5788781 A JPS5788781 A JP S5788781A JP 16330180 A JP16330180 A JP 16330180A JP 16330180 A JP16330180 A JP 16330180A JP S5788781 A JPS5788781 A JP S5788781A
Authority
JP
Japan
Prior art keywords
layer
type layer
fixing hole
fiber
emitting device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16330180A
Other languages
Japanese (ja)
Inventor
Masao Meguro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16330180A priority Critical patent/JPS5788781A/en
Publication of JPS5788781A publication Critical patent/JPS5788781A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4292—Coupling light guides with opto-electronic elements the light guide being disconnectable from the opto-electronic element, e.g. mutually self aligning arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Abstract

PURPOSE:To make the tip end part of a fiber to coincide with the peak position of output automatically and to enhance yield of manufacture of a light emitting device by a method wherein a light take out window of chip is made as the bottom face of a fixing hole reaching a P type layer penetrating a semiconductor layer having the prescribed thickness. CONSTITUTION:The semiconductor layer 23 having the prescribed thickness is formed on the upper face of a thick film substrate 5 of the light emitting device, and a P type layer 6, an N type layer 7, an N<+> type layer 8 are formed in order being accumulated to the prescribed thickness on the lower face of the substrate 5. After the fixing hole 22 to insert the fiber 3 therein is formed on the upper face by photo etching, a P<+> type layer 11 is formed on the plate face. The boundary parts of respective layers 6-8 are made to be exposed at the mesa side part in succession, the part other than the layer 8 of the mesa part is covered with an SiO2 film 9, and a flat cathode electrode 10 is provided on the layer 8 and the film 9. Moreover an anode electrode 12 is formed excluding the bottom part of the fixing hole 22, the layer 11 being exposed in the fixing hole 22 is removed by etching making the electrode 12 thereof as a mask, and the fixing window 2 is formed. The fixing window 2 of the chip 1 is formed as to reach the substrate 5 penetrating the layer 23, and the tip end part of the fiber 3 is made to coincide with the peak position of output.
JP16330180A 1980-11-21 1980-11-21 Light emitting device Pending JPS5788781A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16330180A JPS5788781A (en) 1980-11-21 1980-11-21 Light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16330180A JPS5788781A (en) 1980-11-21 1980-11-21 Light emitting device

Publications (1)

Publication Number Publication Date
JPS5788781A true JPS5788781A (en) 1982-06-02

Family

ID=15771218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16330180A Pending JPS5788781A (en) 1980-11-21 1980-11-21 Light emitting device

Country Status (1)

Country Link
JP (1) JPS5788781A (en)

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