JPS5788724A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5788724A
JPS5788724A JP16410680A JP16410680A JPS5788724A JP S5788724 A JPS5788724 A JP S5788724A JP 16410680 A JP16410680 A JP 16410680A JP 16410680 A JP16410680 A JP 16410680A JP S5788724 A JPS5788724 A JP S5788724A
Authority
JP
Japan
Prior art keywords
film
window
prevented
breakdown voltage
wiring layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16410680A
Other languages
Japanese (ja)
Inventor
Kazunori Imaoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16410680A priority Critical patent/JPS5788724A/en
Publication of JPS5788724A publication Critical patent/JPS5788724A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent deterioration of an insulation breakdown voltage even if a device is highly integrated, by a method wherein a conductive wiring is formed without the thermal process at a high temperature. CONSTITUTION:An electrode window 8 is provided in a PSG film 7 and a SiO2 film 6 formed on a P-type semiconductor 1. A source region 5 is then formed through the window 8. A film 10 on the film 7 is then removed to leave the film 10 in only the window 8. Then, an Al film 11 covers the film 10 and the film 7 to form a conductive wiring layer through patterning by means of a photo etching process. This method keeps a low thermal process temperature and prevents the fusion of the PSG film 7, whereby a gap between a gate electrode 4 and the wiring layer 11 is prevented from narrowing, which results in preventing deterioration of an insulation breakdown voltage. Additionally, the depth of the source region 5 becomes proper and a source-gate capacity is also prevented from increasing.
JP16410680A 1980-11-21 1980-11-21 Manufacture of semiconductor device Pending JPS5788724A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16410680A JPS5788724A (en) 1980-11-21 1980-11-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16410680A JPS5788724A (en) 1980-11-21 1980-11-21 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5788724A true JPS5788724A (en) 1982-06-02

Family

ID=15786866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16410680A Pending JPS5788724A (en) 1980-11-21 1980-11-21 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5788724A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148351A (en) * 1983-02-14 1984-08-25 Fujitsu Ltd Manufacture of semiconductor device
JPH06138013A (en) * 1992-10-26 1994-05-20 Shimizu Corp Method and device for measuring density and water content of soil

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54154272A (en) * 1978-05-26 1979-12-05 Matsushita Electric Ind Co Ltd Contact forming method for semiconductor device
JPS5562733A (en) * 1978-11-03 1980-05-12 Ibm Method of forming narrow region on silicon substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54154272A (en) * 1978-05-26 1979-12-05 Matsushita Electric Ind Co Ltd Contact forming method for semiconductor device
JPS5562733A (en) * 1978-11-03 1980-05-12 Ibm Method of forming narrow region on silicon substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148351A (en) * 1983-02-14 1984-08-25 Fujitsu Ltd Manufacture of semiconductor device
JPH06138013A (en) * 1992-10-26 1994-05-20 Shimizu Corp Method and device for measuring density and water content of soil

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