JPS5763841A - Preparation of semiconductor device - Google Patents
Preparation of semiconductor deviceInfo
- Publication number
- JPS5763841A JPS5763841A JP55139590A JP13959080A JPS5763841A JP S5763841 A JPS5763841 A JP S5763841A JP 55139590 A JP55139590 A JP 55139590A JP 13959080 A JP13959080 A JP 13959080A JP S5763841 A JPS5763841 A JP S5763841A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- region
- film
- silicon
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H10P90/1906—
-
- H10W10/061—
-
- H10W10/181—
-
- H10P90/1908—
-
- H10W10/012—
-
- H10W10/13—
Landscapes
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55139590A JPS5763841A (en) | 1980-10-06 | 1980-10-06 | Preparation of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55139590A JPS5763841A (en) | 1980-10-06 | 1980-10-06 | Preparation of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5763841A true JPS5763841A (en) | 1982-04-17 |
| JPS6155250B2 JPS6155250B2 (index.php) | 1986-11-27 |
Family
ID=15248804
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55139590A Granted JPS5763841A (en) | 1980-10-06 | 1980-10-06 | Preparation of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5763841A (index.php) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58199537A (ja) * | 1982-05-14 | 1983-11-19 | Matsushita Electric Ind Co Ltd | 高抵抗半導体層の製造方法 |
| US4583282A (en) * | 1984-09-14 | 1986-04-22 | Motorola, Inc. | Process for self-aligned buried layer, field guard, and isolation |
| US4948742A (en) * | 1987-09-08 | 1990-08-14 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a semiconductor device |
| US4997786A (en) * | 1986-06-13 | 1991-03-05 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating a semiconductor device having buried insulation layer separated by ditches |
| US5372952A (en) * | 1992-04-03 | 1994-12-13 | National Semiconductor Corporation | Method for forming isolated semiconductor structures |
-
1980
- 1980-10-06 JP JP55139590A patent/JPS5763841A/ja active Granted
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58199537A (ja) * | 1982-05-14 | 1983-11-19 | Matsushita Electric Ind Co Ltd | 高抵抗半導体層の製造方法 |
| US4583282A (en) * | 1984-09-14 | 1986-04-22 | Motorola, Inc. | Process for self-aligned buried layer, field guard, and isolation |
| US4997786A (en) * | 1986-06-13 | 1991-03-05 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating a semiconductor device having buried insulation layer separated by ditches |
| US4948742A (en) * | 1987-09-08 | 1990-08-14 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a semiconductor device |
| US5372952A (en) * | 1992-04-03 | 1994-12-13 | National Semiconductor Corporation | Method for forming isolated semiconductor structures |
| US5376560A (en) * | 1992-04-03 | 1994-12-27 | National Semiconductor Corporation | Method for forming isolated semiconductor structures |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6155250B2 (index.php) | 1986-11-27 |
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