JPS5745243A - Forming method for pattern through corrosion - Google Patents

Forming method for pattern through corrosion

Info

Publication number
JPS5745243A
JPS5745243A JP11969980A JP11969980A JPS5745243A JP S5745243 A JPS5745243 A JP S5745243A JP 11969980 A JP11969980 A JP 11969980A JP 11969980 A JP11969980 A JP 11969980A JP S5745243 A JPS5745243 A JP S5745243A
Authority
JP
Japan
Prior art keywords
layer
corroded
width
substrate
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11969980A
Other languages
Japanese (ja)
Inventor
Kiyoshi Chiyoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11969980A priority Critical patent/JPS5745243A/en
Publication of JPS5745243A publication Critical patent/JPS5745243A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To minimize the width of an undercut section, and to improve the degree of integration by successively executing the various processes of the formation of a resist layer, exposure, development, removal through corrosion and exfoliation to a substrate with a layer to be corroded while repeating said processes and removing the layer to be corroded. CONSTITUTION:The layer to be corroded consisting of an oxide film 3 is shaped to the substrate 2. The layer is coated with the resist layer 5, both layers are exposed and developed through a mask 7 with a predetermined pattern, and the layer to be corroded is removed up to the depth d1 of half the thickness d0 of the layer. The width h1 of the undercut is approximately the same as d1 under this condition. The resist layer 6 is exfoliated, a resist layer is coated again, the same processes are repeated, a section 9 with W opening width is removed and the layer to be corroded 4 is removed by remaining depth up to the substrate. Accordingly, the width of the undercut section is minimized, and the pattern with excellent accuracy is formed.
JP11969980A 1980-09-01 1980-09-01 Forming method for pattern through corrosion Pending JPS5745243A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11969980A JPS5745243A (en) 1980-09-01 1980-09-01 Forming method for pattern through corrosion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11969980A JPS5745243A (en) 1980-09-01 1980-09-01 Forming method for pattern through corrosion

Publications (1)

Publication Number Publication Date
JPS5745243A true JPS5745243A (en) 1982-03-15

Family

ID=14767876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11969980A Pending JPS5745243A (en) 1980-09-01 1980-09-01 Forming method for pattern through corrosion

Country Status (1)

Country Link
JP (1) JPS5745243A (en)

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