JPS5743419A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5743419A JPS5743419A JP11933380A JP11933380A JPS5743419A JP S5743419 A JPS5743419 A JP S5743419A JP 11933380 A JP11933380 A JP 11933380A JP 11933380 A JP11933380 A JP 11933380A JP S5743419 A JPS5743419 A JP S5743419A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- insulating layer
- overall surface
- manufacture
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE:To remove burrs by physically etching the overall surface of an insulating layer and thereafter lifting it off in the lifting-off step in the case of forming the insulating layer to bury an electrode. CONSTITUTION:An insulating layer 3 of SiO2 is covered on the overall surface including an electrode layer 2 and a resist layer 4 formed on a silicon substrate 1. The overall surface is then etched by an ion beam emission, thereby removing burr B. Thereafter, the resist 4 and the insulating layer 3 are removed by a lift-off process, and a wiring layer 5 of second layer is then formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11933380A JPS5743419A (en) | 1980-08-29 | 1980-08-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11933380A JPS5743419A (en) | 1980-08-29 | 1980-08-29 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5743419A true JPS5743419A (en) | 1982-03-11 |
Family
ID=14758877
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11933380A Pending JPS5743419A (en) | 1980-08-29 | 1980-08-29 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5743419A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5443466A (en) * | 1977-09-12 | 1979-04-06 | Matsushita Electronics Corp | Electrode formation method for semiconductor device |
-
1980
- 1980-08-29 JP JP11933380A patent/JPS5743419A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5443466A (en) * | 1977-09-12 | 1979-04-06 | Matsushita Electronics Corp | Electrode formation method for semiconductor device |
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