JPS57211653A - Loop detecting device - Google Patents

Loop detecting device

Info

Publication number
JPS57211653A
JPS57211653A JP56096274A JP9627481A JPS57211653A JP S57211653 A JPS57211653 A JP S57211653A JP 56096274 A JP56096274 A JP 56096274A JP 9627481 A JP9627481 A JP 9627481A JP S57211653 A JPS57211653 A JP S57211653A
Authority
JP
Japan
Prior art keywords
memory
output
program
loop
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56096274A
Other languages
Japanese (ja)
Inventor
Hisashi Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56096274A priority Critical patent/JPS57211653A/en
Publication of JPS57211653A publication Critical patent/JPS57211653A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit

Abstract

PURPOSE:To detect a program loop with a small-capacity memory and designate execution and stop of the loop detection, by setting freely the value of a loop counter for loop detection by a program. CONSTITUTION:If the program instruction read out by each output of an address register 16 which accesses a program memory 14 is a branch instruction, the output of the register 16 for this branch instruction is written in an address memory 32. In this case, a gate 46 is controlled by the output of a decoder 22 and is opened only for the branch instruction, and thus, the address of the memory 14 stored in the register 16 is sent to the memory 32. The output of the memory 16 from the memory 14 is compared with the output of the memory 32 in a comparator 38, and the coincidence output is counted by a loop counter each time, and a permanent loop detection output is generated when the counted value becomes a prescribed value.
JP56096274A 1981-06-22 1981-06-22 Loop detecting device Pending JPS57211653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56096274A JPS57211653A (en) 1981-06-22 1981-06-22 Loop detecting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56096274A JPS57211653A (en) 1981-06-22 1981-06-22 Loop detecting device

Publications (1)

Publication Number Publication Date
JPS57211653A true JPS57211653A (en) 1982-12-25

Family

ID=14160556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56096274A Pending JPS57211653A (en) 1981-06-22 1981-06-22 Loop detecting device

Country Status (1)

Country Link
JP (1) JPS57211653A (en)

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