JPS5775356A - Instruction pre-fetch control system - Google Patents

Instruction pre-fetch control system

Info

Publication number
JPS5775356A
JPS5775356A JP15118780A JP15118780A JPS5775356A JP S5775356 A JPS5775356 A JP S5775356A JP 15118780 A JP15118780 A JP 15118780A JP 15118780 A JP15118780 A JP 15118780A JP S5775356 A JPS5775356 A JP S5775356A
Authority
JP
Japan
Prior art keywords
address
instruction
fetch
register
detection output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15118780A
Other languages
Japanese (ja)
Inventor
Fumio Hoshi
Masao Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15118780A priority Critical patent/JPS5775356A/en
Publication of JPS5775356A publication Critical patent/JPS5775356A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling

Abstract

PURPOSE:To ensure an economical output of the detection output of the prescribed conditions corresponding to the instruction to be pre-fetched, by discontinuing the pre-fetch function of a pre-fetch control circuit with the detection output of the prescribed conditions when the instruction of a pre-fetch control circuit is prefetched. CONSTITUTION:An instruction (1000) is stored in a register 6, and an address 1001 is set at an address register 10 under execution of an operation. Then the instruction (1001) is read out of a main memory 1. Thus a control circuit 2' pre-fetches the instruction and stores it in a pre-fetch buffer 3-1. A condition detecting circuit 4' supplies the address 1001 and decides the satisfaction of conditions of either one of an address exception, a storage protection exceptin, an address coincidence, etc. Then the detection output (1001) is stored in a condition detection register 7 and also transmitted to a pre-fetch stopping circuit 11 to stop the function of the circuit 2'. As a result, the address setting of the register 10 is held to eliminate the installation of a control buffer, etc. Thus the detection output of the prescribed conditions is delivered consecutively.
JP15118780A 1980-10-28 1980-10-28 Instruction pre-fetch control system Pending JPS5775356A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15118780A JPS5775356A (en) 1980-10-28 1980-10-28 Instruction pre-fetch control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15118780A JPS5775356A (en) 1980-10-28 1980-10-28 Instruction pre-fetch control system

Publications (1)

Publication Number Publication Date
JPS5775356A true JPS5775356A (en) 1982-05-11

Family

ID=15513176

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15118780A Pending JPS5775356A (en) 1980-10-28 1980-10-28 Instruction pre-fetch control system

Country Status (1)

Country Link
JP (1) JPS5775356A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943447A (en) * 1982-09-03 1984-03-10 Hitachi Ltd Data processor
JPS60179846A (en) * 1984-02-27 1985-09-13 Fujitsu Ltd Interruption control system at exceptional conversion
JPS60238934A (en) * 1984-05-11 1985-11-27 Nec Corp Precedence controlling device
JPS62144246A (en) * 1985-12-18 1987-06-27 Mitsubishi Electric Corp Computer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943447A (en) * 1982-09-03 1984-03-10 Hitachi Ltd Data processor
JPS60179846A (en) * 1984-02-27 1985-09-13 Fujitsu Ltd Interruption control system at exceptional conversion
JPH0235331B2 (en) * 1984-02-27 1990-08-09 Fujitsu Ltd
JPS60238934A (en) * 1984-05-11 1985-11-27 Nec Corp Precedence controlling device
JPS62144246A (en) * 1985-12-18 1987-06-27 Mitsubishi Electric Corp Computer

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