JPS57210667A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS57210667A JPS57210667A JP57076739A JP7673982A JPS57210667A JP S57210667 A JPS57210667 A JP S57210667A JP 57076739 A JP57076739 A JP 57076739A JP 7673982 A JP7673982 A JP 7673982A JP S57210667 A JPS57210667 A JP S57210667A
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline silicon
- bit line
- memory device
- semiconductor memory
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
- 239000012535 impurity Substances 0.000 abstract 1
- 230000010354 integration Effects 0.000 abstract 1
- 230000003071 parasitic effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To improve the integration of a semiconductor memory device by omitting a drain region of a switching MISFET, thereby reducing the area of a memory cell. CONSTITUTION:A memory cell is obtained with a bit line, a word line 6, negative electrode 3' of a capacitance element made of polycrystalline silicon, a gate electrode 5 of a switching MISFET made of a polycrystalline silicon layer formed on an insulating film 2' overlapped with the bit line and the capacitance element through an insulating film 3''. In this case, the bit line is formed of a polycrystalline silicon layer 3', to which an impurity of the same conductive type as a source region 4 is injected, and is connected directly to the source region 4. In this manner, the cell area can be reduced, and the parasitic capacity of the digit line can be reduced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57076739A JPS5815946B2 (en) | 1982-05-10 | 1982-05-10 | semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57076739A JPS5815946B2 (en) | 1982-05-10 | 1982-05-10 | semiconductor memory device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50066563A Division JPS51142932A (en) | 1975-06-04 | 1975-06-04 | Semiconductor memory devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57210667A true JPS57210667A (en) | 1982-12-24 |
| JPS5815946B2 JPS5815946B2 (en) | 1983-03-28 |
Family
ID=13613962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57076739A Expired JPS5815946B2 (en) | 1982-05-10 | 1982-05-10 | semiconductor memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5815946B2 (en) |
-
1982
- 1982-05-10 JP JP57076739A patent/JPS5815946B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5815946B2 (en) | 1983-03-28 |
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