JPS56107571A - Semiconductor memory storage device - Google Patents

Semiconductor memory storage device

Info

Publication number
JPS56107571A
JPS56107571A JP960680A JP960680A JPS56107571A JP S56107571 A JPS56107571 A JP S56107571A JP 960680 A JP960680 A JP 960680A JP 960680 A JP960680 A JP 960680A JP S56107571 A JPS56107571 A JP S56107571A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
insulating layer
formed
capacity
film
incoming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP960680A
Other versions
JPH0131308B2 (en )
Inventor
Junji Sakurai
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/108Dynamic random access memory structures
    • H01L27/10805Dynamic random access memory structures with one-transistor one-capacitor memory cells

Abstract

PURPOSE:To prevent occurrence of a soft error due to incoming of alpha rays by adding electrostatic capacity arising on a buried insulating layer to a memory capacitor to increase capacitor essentially. CONSTITUTION:A buried insulating layer 12 consisting of an SiO2 film is formed selectively on a P<+> type silicon substrate 11, and also a P<-> type epitaxial layer 13a and a polysilicon layer 13b are formed. Further, a field oxide film 14 is formed with an insulating layer 15 consisting of an Si3N4 film as a mask, and also a polycrystalline silicon electrode 16, an SiO2 film 18 and a polycrystalline gate electrode 19 are formed. According to the above constitution, capacity C2 with the insulating layer 15 as a dielectric and capacity C1 with the bruied insulating layer 12 as a dielectic are connected in parallel to constitute a dynamic memory cell. A storage capacity can be increased two times or more thereby to prevent occurrence of a soft error due to incoming of alpha rays.
JP960680A 1980-01-30 1980-01-30 Expired JPH0131308B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP960680A JPH0131308B2 (en) 1980-01-30 1980-01-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP960680A JPH0131308B2 (en) 1980-01-30 1980-01-30

Publications (2)

Publication Number Publication Date
JPS56107571A true true JPS56107571A (en) 1981-08-26
JPH0131308B2 JPH0131308B2 (en) 1989-06-26

Family

ID=11724955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP960680A Expired JPH0131308B2 (en) 1980-01-30 1980-01-30

Country Status (1)

Country Link
JP (1) JPH0131308B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57176757A (en) * 1981-04-22 1982-10-30 Nec Corp Semiconductor device
EP0083210A2 (en) * 1981-12-29 1983-07-06 Fujitsu Limited A semiconductor device which prevents soft errors
JPS58204568A (en) * 1982-05-24 1983-11-29 Hitachi Ltd Semiconductor device
JPS5928373A (en) * 1982-08-09 1984-02-15 Nec Corp Semiconductor device
JPS6151964A (en) * 1984-08-22 1986-03-14 Nec Corp Semiconductor device
JPS6151965A (en) * 1984-08-22 1986-03-14 Nec Corp Semiconductor memory device
JPS61170060A (en) * 1985-01-23 1986-07-31 Mitsubishi Electric Corp Semiconductor memory
JPS63246866A (en) * 1987-04-01 1988-10-13 Mitsubishi Electric Corp Manufacture of one-transistor type dynamic memory cell
US5594698A (en) * 1993-03-17 1997-01-14 Zycad Corporation Random access memory (RAM) based configurable arrays

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519820A (en) * 1978-07-27 1980-02-12 Nec Corp Semiconductor device
JPS5670657A (en) * 1979-11-14 1981-06-12 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519820A (en) * 1978-07-27 1980-02-12 Nec Corp Semiconductor device
JPS5670657A (en) * 1979-11-14 1981-06-12 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57176757A (en) * 1981-04-22 1982-10-30 Nec Corp Semiconductor device
JPH0320906B2 (en) * 1981-04-22 1991-03-20 Nippon Electric Co
EP0083210A2 (en) * 1981-12-29 1983-07-06 Fujitsu Limited A semiconductor device which prevents soft errors
JPH046106B2 (en) * 1982-05-24 1992-02-04 Hitachi Ltd
JPS58204568A (en) * 1982-05-24 1983-11-29 Hitachi Ltd Semiconductor device
JPS5928373A (en) * 1982-08-09 1984-02-15 Nec Corp Semiconductor device
JPS6151964A (en) * 1984-08-22 1986-03-14 Nec Corp Semiconductor device
JPS6151965A (en) * 1984-08-22 1986-03-14 Nec Corp Semiconductor memory device
JPS61170060A (en) * 1985-01-23 1986-07-31 Mitsubishi Electric Corp Semiconductor memory
JPS63246866A (en) * 1987-04-01 1988-10-13 Mitsubishi Electric Corp Manufacture of one-transistor type dynamic memory cell
US5594698A (en) * 1993-03-17 1997-01-14 Zycad Corporation Random access memory (RAM) based configurable arrays

Also Published As

Publication number Publication date Type
JPH0131308B2 (en) 1989-06-26 grant

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