JPS57208172A - Controlling method for threshold voltage of mos field effect transistor - Google Patents

Controlling method for threshold voltage of mos field effect transistor

Info

Publication number
JPS57208172A
JPS57208172A JP56093157A JP9315781A JPS57208172A JP S57208172 A JPS57208172 A JP S57208172A JP 56093157 A JP56093157 A JP 56093157A JP 9315781 A JP9315781 A JP 9315781A JP S57208172 A JPS57208172 A JP S57208172A
Authority
JP
Japan
Prior art keywords
silicon
voltage
film
silicide
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56093157A
Other languages
English (en)
Other versions
JPH0358186B2 (ja
Inventor
Mitsutaka Morimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56093157A priority Critical patent/JPS57208172A/ja
Publication of JPS57208172A publication Critical patent/JPS57208172A/ja
Publication of JPH0358186B2 publication Critical patent/JPH0358186B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
JP56093157A 1981-06-17 1981-06-17 Controlling method for threshold voltage of mos field effect transistor Granted JPS57208172A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56093157A JPS57208172A (en) 1981-06-17 1981-06-17 Controlling method for threshold voltage of mos field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56093157A JPS57208172A (en) 1981-06-17 1981-06-17 Controlling method for threshold voltage of mos field effect transistor

Publications (2)

Publication Number Publication Date
JPS57208172A true JPS57208172A (en) 1982-12-21
JPH0358186B2 JPH0358186B2 (ja) 1991-09-04

Family

ID=14074705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56093157A Granted JPS57208172A (en) 1981-06-17 1981-06-17 Controlling method for threshold voltage of mos field effect transistor

Country Status (1)

Country Link
JP (1) JPS57208172A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0766293A2 (fr) * 1995-09-28 1997-04-02 STMicroelectronics S.A. Procédé de modification du dopage d'une couche de silicium

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0766293A2 (fr) * 1995-09-28 1997-04-02 STMicroelectronics S.A. Procédé de modification du dopage d'une couche de silicium
FR2739491A1 (fr) * 1995-09-28 1997-04-04 Sgs Thomson Microelectronics Procede de modification du dopage d'une couche de silicium
EP0766293A3 (ja) * 1995-09-28 1997-04-16 Sgs Thomson Microelectronics
US6645803B1 (en) 1995-09-28 2003-11-11 Sgs-Thomson Microelectronics S.A. Method for modifying the doping level of a silicon layer

Also Published As

Publication number Publication date
JPH0358186B2 (ja) 1991-09-04

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