JPS57206037A - Device for positioning of flip chip - Google Patents

Device for positioning of flip chip

Info

Publication number
JPS57206037A
JPS57206037A JP8954781A JP8954781A JPS57206037A JP S57206037 A JPS57206037 A JP S57206037A JP 8954781 A JP8954781 A JP 8954781A JP 8954781 A JP8954781 A JP 8954781A JP S57206037 A JPS57206037 A JP S57206037A
Authority
JP
Japan
Prior art keywords
pattern
substrate
overlapped
monitor
images
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8954781A
Other languages
Japanese (ja)
Inventor
Masaru Sakaguchi
Ichiro Ishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8954781A priority Critical patent/JPS57206037A/en
Publication of JPS57206037A publication Critical patent/JPS57206037A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757Means for aligning
    • H01L2224/75753Means for optical alignment, e.g. sensors

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To avoid the mispositioning by separately introducing a pattern image on a substrate and a pattern image on a semiconductor element into an optical system, overlapping both images on the same optical axis by the processing in the optical system, expanding and displaying the images, and monitoring the position aligning state. CONSTITUTION:An optical box 19 is moved between the substrate 12 and an LSI chip 18. The pattern of the upper surface of the substrate and the pattern of the bottom surface of the chip are displayed on a TV monitor 26 through the box 19, an image pickup device 24, and a cable 25. Said patterns are arbitrarily moved by an X table 6 and a Y table 8 and displayed on the monitor 26. The positions of the patterns on the substrate 12 and the chip 18 are corrected and the magnification thereof are compensated, in the internal optical system in the box 19, respectively. Both images are overlapped on the same axis and transmitted to the monitor 26. The image of the overlapped pattern 29 is observed, and the X table 6, the Y table 8, and a rotary table 3 are manipulated, thereby the both position aligning patterns are overlapped.
JP8954781A 1981-06-12 1981-06-12 Device for positioning of flip chip Pending JPS57206037A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8954781A JPS57206037A (en) 1981-06-12 1981-06-12 Device for positioning of flip chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8954781A JPS57206037A (en) 1981-06-12 1981-06-12 Device for positioning of flip chip

Publications (1)

Publication Number Publication Date
JPS57206037A true JPS57206037A (en) 1982-12-17

Family

ID=13973841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8954781A Pending JPS57206037A (en) 1981-06-12 1981-06-12 Device for positioning of flip chip

Country Status (1)

Country Link
JP (1) JPS57206037A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0228343A (en) * 1988-06-13 1990-01-30 Nippon Telegr & Teleph Corp <Ntt> Apparatus for alignment and connection of element and substrate
JPH02130941A (en) * 1988-11-11 1990-05-18 Hitachi Commun Syst Inc Mounting method for ic chip onto substrate
JPH02244649A (en) * 1988-10-28 1990-09-28 A O Inc Aligument/junction device
JPH04338657A (en) * 1991-05-15 1992-11-25 Alps Electric Co Ltd Connecting structure connecting method and connecting device between chip part and substrate
JPH10163253A (en) * 1996-12-03 1998-06-19 Matsushita Electric Ind Co Ltd Camera for alignment, method and apparatus for aligning electronic component

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5487177A (en) * 1977-12-23 1979-07-11 Fujitsu Ltd Component positioning unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5487177A (en) * 1977-12-23 1979-07-11 Fujitsu Ltd Component positioning unit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0228343A (en) * 1988-06-13 1990-01-30 Nippon Telegr & Teleph Corp <Ntt> Apparatus for alignment and connection of element and substrate
JPH02244649A (en) * 1988-10-28 1990-09-28 A O Inc Aligument/junction device
JPH02130941A (en) * 1988-11-11 1990-05-18 Hitachi Commun Syst Inc Mounting method for ic chip onto substrate
JPH04338657A (en) * 1991-05-15 1992-11-25 Alps Electric Co Ltd Connecting structure connecting method and connecting device between chip part and substrate
JPH10163253A (en) * 1996-12-03 1998-06-19 Matsushita Electric Ind Co Ltd Camera for alignment, method and apparatus for aligning electronic component

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