JPS57202757A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS57202757A
JPS57202757A JP8865881A JP8865881A JPS57202757A JP S57202757 A JPS57202757 A JP S57202757A JP 8865881 A JP8865881 A JP 8865881A JP 8865881 A JP8865881 A JP 8865881A JP S57202757 A JPS57202757 A JP S57202757A
Authority
JP
Japan
Prior art keywords
wiring layer
film
insulating film
layer
grow
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8865881A
Other languages
Japanese (ja)
Other versions
JPS639747B2 (en
Inventor
Shoichi Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8865881A priority Critical patent/JPS57202757A/en
Publication of JPS57202757A publication Critical patent/JPS57202757A/en
Publication of JPS639747B2 publication Critical patent/JPS639747B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To avoid generation of disconnection or short-circuit of an upper layer metal wiring layer to be provided on a lower layer wiring layer when an interlayer insulating film of a semiconductor device having multilayer wiring structure is to be formed by a method wherein the sides of the first insulating film are made to have the taper type, and the second insulating film is made to grow thereon to form the smooth stepped part. CONSTITUTION:An oxide film 2 is adhered on an Si substrate 1, the wiring layer 3 having the step part with the prescribed size is formed thereon, and the plasma nitride film 4 to constitute the interlayer insulating film is made to grow on the whole surface surrounding the wiring layer thereof. Then taper is formed on the whole surface of the film 4 covering the shoulder parts of the lower layer wiring layer using an ion cylinder, while at this time, narrow grooves 10 are generated in the film 4 along the shoulder parts because of existence of the shoulder parts of wiring layer. Therefore the plasma nitride film 5 is made to grow again on the whole surface, and the grooves 10 are buried at the same time to form the smooth interlayer insulating film on the whole. Accordingly generation of disconnection or short-circuit of the upper layer wiring layer to be provided thereon is prevented.
JP8865881A 1981-06-09 1981-06-09 Semiconductor device and manufacture thereof Granted JPS57202757A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8865881A JPS57202757A (en) 1981-06-09 1981-06-09 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8865881A JPS57202757A (en) 1981-06-09 1981-06-09 Semiconductor device and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS57202757A true JPS57202757A (en) 1982-12-11
JPS639747B2 JPS639747B2 (en) 1988-03-01

Family

ID=13948914

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8865881A Granted JPS57202757A (en) 1981-06-09 1981-06-09 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS57202757A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52156375A (en) * 1976-06-22 1977-12-26 Nippon Electric Co Method of producing multilayer circuit substrate
JPS53108389A (en) * 1977-03-04 1978-09-21 Hitachi Ltd Manufacture for semiconductor device
JPS54142981A (en) * 1978-04-27 1979-11-07 Matsushita Electric Ind Co Ltd Manufacture of insulation gate type semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52156375A (en) * 1976-06-22 1977-12-26 Nippon Electric Co Method of producing multilayer circuit substrate
JPS53108389A (en) * 1977-03-04 1978-09-21 Hitachi Ltd Manufacture for semiconductor device
JPS54142981A (en) * 1978-04-27 1979-11-07 Matsushita Electric Ind Co Ltd Manufacture of insulation gate type semiconductor device

Also Published As

Publication number Publication date
JPS639747B2 (en) 1988-03-01

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