JPS57196335A - Shared storage device - Google Patents
Shared storage deviceInfo
- Publication number
- JPS57196335A JPS57196335A JP56080251A JP8025181A JPS57196335A JP S57196335 A JPS57196335 A JP S57196335A JP 56080251 A JP56080251 A JP 56080251A JP 8025181 A JP8025181 A JP 8025181A JP S57196335 A JPS57196335 A JP S57196335A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- line
- request
- signal
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System (AREA)
Abstract
PURPOSE:To prevent the lowering of the processing capacity of a system, by avoiding the inhibition of an access given from another CPU for a long period of time when the CPU that gives a request for inhibition of the access request has a breakdown. CONSTITUTION:The access request signal is applied to a request circuit 9a of an interface 71c through a line 8a and then supplied to a priority deciding circuit 11 via a line 10a. At the same time, the access request signal supplied from another interface is supplied to the circuit 11 through a line 10b. In this case, the exclusive request signal of a line 17a is fed to an exclusive control circuit 19, and the inhibiting signal is produced from the circuit 19. Thus the circuit 11 is prevented from accepting the signals excepting that of the request line 10a. Then the count value of a counter 20 is added for each prescribed time and then compared 23 with the set value of a register 22. When the count value of the counter 20 is larger than the set value, it is decided that the access inhibiting time for another system is improperly increased. Thus the release signal is delivered to the circuit 19 from a comparator 24 to release the inhibiting signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56080251A JPS57196335A (en) | 1981-05-27 | 1981-05-27 | Shared storage device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56080251A JPS57196335A (en) | 1981-05-27 | 1981-05-27 | Shared storage device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57196335A true JPS57196335A (en) | 1982-12-02 |
Family
ID=13713093
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56080251A Pending JPS57196335A (en) | 1981-05-27 | 1981-05-27 | Shared storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57196335A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0425181A2 (en) * | 1989-10-27 | 1991-05-02 | International Business Machines Corporation | Preference circuit for a computer system |
JPH04273561A (en) * | 1991-02-28 | 1992-09-29 | Nec Corp | Occupancy control method and device for input/output device |
-
1981
- 1981-05-27 JP JP56080251A patent/JPS57196335A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0425181A2 (en) * | 1989-10-27 | 1991-05-02 | International Business Machines Corporation | Preference circuit for a computer system |
JPH04273561A (en) * | 1991-02-28 | 1992-09-29 | Nec Corp | Occupancy control method and device for input/output device |
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