JPS5347240A - Control system for intermediate buffer - Google Patents
Control system for intermediate bufferInfo
- Publication number
- JPS5347240A JPS5347240A JP12171876A JP12171876A JPS5347240A JP S5347240 A JPS5347240 A JP S5347240A JP 12171876 A JP12171876 A JP 12171876A JP 12171876 A JP12171876 A JP 12171876A JP S5347240 A JPS5347240 A JP S5347240A
- Authority
- JP
- Japan
- Prior art keywords
- intermediate buffer
- control system
- comparator
- decrease
- reduce
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE: To reduce the number of both the comparator and selector circuits, and thus to decrease the controlling hardware quantity for an intermediate buffer memory.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12171876A JPS5347240A (en) | 1976-10-09 | 1976-10-09 | Control system for intermediate buffer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12171876A JPS5347240A (en) | 1976-10-09 | 1976-10-09 | Control system for intermediate buffer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5347240A true JPS5347240A (en) | 1978-04-27 |
JPS5643546B2 JPS5643546B2 (en) | 1981-10-13 |
Family
ID=14818150
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12171876A Granted JPS5347240A (en) | 1976-10-09 | 1976-10-09 | Control system for intermediate buffer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5347240A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0032956A1 (en) * | 1979-07-25 | 1981-08-05 | Fujitsu Limited | Data processing system utilizing hierarchical memory |
US5361342A (en) * | 1990-07-27 | 1994-11-01 | Fujitsu Limited | Tag control system in a hierarchical memory control system |
-
1976
- 1976-10-09 JP JP12171876A patent/JPS5347240A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0032956A1 (en) * | 1979-07-25 | 1981-08-05 | Fujitsu Limited | Data processing system utilizing hierarchical memory |
EP0032956B1 (en) * | 1979-07-25 | 1987-09-30 | Fujitsu Limited | Data processing system utilizing hierarchical memory |
US5361342A (en) * | 1990-07-27 | 1994-11-01 | Fujitsu Limited | Tag control system in a hierarchical memory control system |
Also Published As
Publication number | Publication date |
---|---|
JPS5643546B2 (en) | 1981-10-13 |
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