JPS5672753A - Selective processor for occupation of common bus line - Google Patents
Selective processor for occupation of common bus lineInfo
- Publication number
- JPS5672753A JPS5672753A JP15044679A JP15044679A JPS5672753A JP S5672753 A JPS5672753 A JP S5672753A JP 15044679 A JP15044679 A JP 15044679A JP 15044679 A JP15044679 A JP 15044679A JP S5672753 A JPS5672753 A JP S5672753A
- Authority
- JP
- Japan
- Prior art keywords
- processor
- stand
- state
- bus line
- processors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Multi Processors (AREA)
- Bus Control (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE: To prevent functions of a processor low in priority from deteriorating by selectively determining the priorities of processors, by holding a processor, making a request, in a stand-by state and by resetting the stand-by state a certain time later.
CONSTITUTION: Processors 1W3 with functions are connected to common RAM5 via bus line arbiter 4 to perform data processing. Those processors 1W3, when to use RAM5, output request signals RQ1WRQ3 and perform the processing according to the cyclic priority prescribed by bus line arbiter 4. Those processors are provided with WAIT state detecting circuit 6 and when one processor lower in priority makes a request during the processing in the prescribed order, the processor is held in a stand-by state under the control of detecting circuit 6 and then released from the stand-by state a certain time later to perform the interruption processing, so that the whole system can function.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15044679A JPS5672753A (en) | 1979-11-20 | 1979-11-20 | Selective processor for occupation of common bus line |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15044679A JPS5672753A (en) | 1979-11-20 | 1979-11-20 | Selective processor for occupation of common bus line |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5672753A true JPS5672753A (en) | 1981-06-17 |
Family
ID=15497105
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15044679A Pending JPS5672753A (en) | 1979-11-20 | 1979-11-20 | Selective processor for occupation of common bus line |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5672753A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5875347A (en) * | 1981-10-29 | 1983-05-07 | Kokusai Electric Co Ltd | Controlling method for end office transmission of conflict system data circuit |
JPH01234963A (en) * | 1988-03-15 | 1989-09-20 | Koyo Electron Ind Co Ltd | Data processor |
JPH02219156A (en) * | 1988-12-21 | 1990-08-31 | Internatl Business Mach Corp <Ibm> | Access priority determining apparatus and bus arbiter |
JPH0782476B2 (en) * | 1987-05-01 | 1995-09-06 | ディジタル イクイプメント コーポレーション | A system that controls access to the reservation bus by multiple nodes |
-
1979
- 1979-11-20 JP JP15044679A patent/JPS5672753A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5875347A (en) * | 1981-10-29 | 1983-05-07 | Kokusai Electric Co Ltd | Controlling method for end office transmission of conflict system data circuit |
JPH0782476B2 (en) * | 1987-05-01 | 1995-09-06 | ディジタル イクイプメント コーポレーション | A system that controls access to the reservation bus by multiple nodes |
JPH01234963A (en) * | 1988-03-15 | 1989-09-20 | Koyo Electron Ind Co Ltd | Data processor |
JPH02219156A (en) * | 1988-12-21 | 1990-08-31 | Internatl Business Mach Corp <Ibm> | Access priority determining apparatus and bus arbiter |
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