JPS6413660A - Bus arbiter - Google Patents

Bus arbiter

Info

Publication number
JPS6413660A
JPS6413660A JP17035887A JP17035887A JPS6413660A JP S6413660 A JPS6413660 A JP S6413660A JP 17035887 A JP17035887 A JP 17035887A JP 17035887 A JP17035887 A JP 17035887A JP S6413660 A JPS6413660 A JP S6413660A
Authority
JP
Japan
Prior art keywords
bus
condition
priority
processors
competition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17035887A
Other languages
Japanese (ja)
Inventor
Hiroyuki Yamaguchi
Hideaki Ito
Kazumasa Washimi
Hideo Arakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyota Central R&D Labs Inc
Original Assignee
Toyota Central R&D Labs Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyota Central R&D Labs Inc filed Critical Toyota Central R&D Labs Inc
Priority to JP17035887A priority Critical patent/JPS6413660A/en
Publication of JPS6413660A publication Critical patent/JPS6413660A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Abstract

PURPOSE:To flexibly set the priority of the bus use given to a processor by classifying the condition of buses into a bus ready condition and a bus busy condition and providing the priority classified by each condition. CONSTITUTION:To bus requesting signals RQ0-RQn outputted by respective processors P0-Pn, for the competition in a bus ready condition, a first arbitrating circuit 2 determines the bus use sequence of respective processors and for the competition in a bus busy condition, a second arbitrating circuit 3 determines the bus use sequence of respective processors P0-Pn after the bus requesting signals RQ0-RQn received by the bus ready condition are all processed. Thus, only by changing the priority with first and second arbitrating circuits, the arbiter can cope with flexibly using the bus giving a priority to a special processor, using the bus fairly between processors, further, using the bus giving a priority to the special processor and fairly between other processors and so forth, and the optimum bus competition control in accordance with a system can be executed.
JP17035887A 1987-07-07 1987-07-07 Bus arbiter Pending JPS6413660A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17035887A JPS6413660A (en) 1987-07-07 1987-07-07 Bus arbiter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17035887A JPS6413660A (en) 1987-07-07 1987-07-07 Bus arbiter

Publications (1)

Publication Number Publication Date
JPS6413660A true JPS6413660A (en) 1989-01-18

Family

ID=15903455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17035887A Pending JPS6413660A (en) 1987-07-07 1987-07-07 Bus arbiter

Country Status (1)

Country Link
JP (1) JPS6413660A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2010001515A1 (en) * 2008-07-04 2011-12-15 三菱電機株式会社 Bus arbitration device and navigation device using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2010001515A1 (en) * 2008-07-04 2011-12-15 三菱電機株式会社 Bus arbitration device and navigation device using the same

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