JPS57190331A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS57190331A
JPS57190331A JP7484681A JP7484681A JPS57190331A JP S57190331 A JPS57190331 A JP S57190331A JP 7484681 A JP7484681 A JP 7484681A JP 7484681 A JP7484681 A JP 7484681A JP S57190331 A JPS57190331 A JP S57190331A
Authority
JP
Japan
Prior art keywords
film
wiring
formation
side wall
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7484681A
Other languages
Japanese (ja)
Inventor
Naoyuki Shigyo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7484681A priority Critical patent/JPS57190331A/en
Publication of JPS57190331A publication Critical patent/JPS57190331A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To reduce wiring capacity greatly, by forming holes in the region among conductor wirings. CONSTITUTION:An Al film 3 is evaporated thicker than the interval of wirings on an SiO2 film 2 on an Si substrate 1 to form the wiring 3 by reactive etching. Succeedingly, the SiO2 film 4 is heaped by a CVD method for the completion. This constitution forms holes 5 with the great reduction of wiring capacity. Besides, a wiring layer may be used in Si, Mo, etc. with effectivity of the formation of an oxide film on a side wall or the formation of a side wall in inverse taper.
JP7484681A 1981-05-20 1981-05-20 Semiconductor device and manufacture thereof Pending JPS57190331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7484681A JPS57190331A (en) 1981-05-20 1981-05-20 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7484681A JPS57190331A (en) 1981-05-20 1981-05-20 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS57190331A true JPS57190331A (en) 1982-11-22

Family

ID=13559087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7484681A Pending JPS57190331A (en) 1981-05-20 1981-05-20 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS57190331A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6303487B1 (en) 1998-12-03 2001-10-16 Nec Corporation Method for forming an air gap in an insulating film between adjacent interconnection conductors in a semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54139491A (en) * 1978-04-21 1979-10-29 Hitachi Ltd Wiring forming method
JPS5568700A (en) * 1978-11-14 1980-05-23 Philips Nv Wiring device and method of manufacturing same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54139491A (en) * 1978-04-21 1979-10-29 Hitachi Ltd Wiring forming method
JPS5568700A (en) * 1978-11-14 1980-05-23 Philips Nv Wiring device and method of manufacturing same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6303487B1 (en) 1998-12-03 2001-10-16 Nec Corporation Method for forming an air gap in an insulating film between adjacent interconnection conductors in a semiconductor device

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