JPS57172739A - Pattern forming method - Google Patents

Pattern forming method

Info

Publication number
JPS57172739A
JPS57172739A JP56057899A JP5789981A JPS57172739A JP S57172739 A JPS57172739 A JP S57172739A JP 56057899 A JP56057899 A JP 56057899A JP 5789981 A JP5789981 A JP 5789981A JP S57172739 A JPS57172739 A JP S57172739A
Authority
JP
Japan
Prior art keywords
film
plasma
mask
sio2
polymer film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56057899A
Other languages
Japanese (ja)
Inventor
Akira Kurosawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56057899A priority Critical patent/JPS57172739A/en
Priority to DE8181305010T priority patent/DE3173581D1/en
Priority to EP81305010A priority patent/EP0050973B1/en
Priority to US06/315,909 priority patent/US4371407A/en
Publication of JPS57172739A publication Critical patent/JPS57172739A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To form a minute pattern by a method wherein the first material film on the specified substrate is provided with the mask made of the second material and the surface of the second material is etched in the atmosphere of specified plasma while the exposed surface of the first material is provided with the plasma polymer film as a mask for etching. CONSTITUTION:Al 3 is accumulated on an SiO2 film on an Si substrate 1 to perform reaction type ion etching making use of an SiO2 4 formed by the plasma CVD processing as a mask. At this time, SiO2 film 4 is etched accumulating the plasma polymer film 5 on Al 3. Next Al 3 is etched making use of the polymer film 5 as a mask forming the required wiring pattern. Lastly the polymer film 5 is removed by reducing to ashes by means of O2 plasma. The first material comprising metal, Si, Si3N4 or macromolecule film and the second laterial comprising SiO2 film are effective when they are utilized for etching in the plasma atmosphere of CF4 and H2.
JP56057899A 1980-10-28 1981-04-17 Pattern forming method Pending JPS57172739A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP56057899A JPS57172739A (en) 1981-04-17 1981-04-17 Pattern forming method
DE8181305010T DE3173581D1 (en) 1980-10-28 1981-10-23 Masking process for semiconductor devices using a polymer film
EP81305010A EP0050973B1 (en) 1980-10-28 1981-10-23 Masking process for semiconductor devices using a polymer film
US06/315,909 US4371407A (en) 1980-10-28 1981-10-28 Method for producing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56057899A JPS57172739A (en) 1981-04-17 1981-04-17 Pattern forming method

Publications (1)

Publication Number Publication Date
JPS57172739A true JPS57172739A (en) 1982-10-23

Family

ID=13068832

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56057899A Pending JPS57172739A (en) 1980-10-28 1981-04-17 Pattern forming method

Country Status (1)

Country Link
JP (1) JPS57172739A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS527315A (en) * 1975-05-28 1977-01-20 Pechiney Aluminium Making of wire consist of aluminium magnesiummsilicon alloy
JPS52120782A (en) * 1976-04-05 1977-10-11 Nec Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS527315A (en) * 1975-05-28 1977-01-20 Pechiney Aluminium Making of wire consist of aluminium magnesiummsilicon alloy
JPS52120782A (en) * 1976-04-05 1977-10-11 Nec Corp Manufacture of semiconductor device

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