JPS57155747A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57155747A
JPS57155747A JP4132481A JP4132481A JPS57155747A JP S57155747 A JPS57155747 A JP S57155747A JP 4132481 A JP4132481 A JP 4132481A JP 4132481 A JP4132481 A JP 4132481A JP S57155747 A JPS57155747 A JP S57155747A
Authority
JP
Japan
Prior art keywords
film
polycrystalline
oxide film
si3n4
covered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4132481A
Other languages
Japanese (ja)
Other versions
JPH0350418B2 (en
Inventor
Takehide Shirato
Keiji Nishimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4132481A priority Critical patent/JPS57155747A/en
Publication of JPS57155747A publication Critical patent/JPS57155747A/en
Publication of JPH0350418B2 publication Critical patent/JPH0350418B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain a high-dielectric strength element by a method wherein anisotropic dry etching is applied to a polycrystal semiconductor film coated and covered on an oxide-resistance mask pattern on a substrate and only the edge part of the mask pattern is left to form channel cut regions. CONSTITUTION:An Si3N4 film 12 is formed in patterning on a P type substrate 11 coated and covered by an insulating film 11. A block oxide film 13 and a polycrystalline Si film 14 are consecutively stacked and formed on the Si3N4 film 12. Only the polycrystalline Si film located on the Si3N4 film 12 is removed by RIPE-type dry etching. Ion implantation is applied to high-concentration boron B<+> through the block oxide film 13 to form channel cut p<+> region 15. After applying the removal of etching to the polycrystalline Si film 14 and the block oxide film 13, a thick field oxide film 8 is formed. In this way, a high- dielectric strength element can easily be formed.
JP4132481A 1981-03-20 1981-03-20 Manufacture of semiconductor device Granted JPS57155747A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4132481A JPS57155747A (en) 1981-03-20 1981-03-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4132481A JPS57155747A (en) 1981-03-20 1981-03-20 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS57155747A true JPS57155747A (en) 1982-09-25
JPH0350418B2 JPH0350418B2 (en) 1991-08-01

Family

ID=12605337

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4132481A Granted JPS57155747A (en) 1981-03-20 1981-03-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57155747A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5347782A (en) * 1976-10-13 1978-04-28 Hitachi Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5347782A (en) * 1976-10-13 1978-04-28 Hitachi Ltd Production of semiconductor device

Also Published As

Publication number Publication date
JPH0350418B2 (en) 1991-08-01

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