JPS57154874A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS57154874A JPS57154874A JP3941381A JP3941381A JPS57154874A JP S57154874 A JPS57154874 A JP S57154874A JP 3941381 A JP3941381 A JP 3941381A JP 3941381 A JP3941381 A JP 3941381A JP S57154874 A JPS57154874 A JP S57154874A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- substrate
- sio2 film
- diffusion
- turned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 12
- 229910052681 coesite Inorganic materials 0.000 abstract 6
- 229910052906 cristobalite Inorganic materials 0.000 abstract 6
- 239000000377 silicon dioxide Substances 0.000 abstract 6
- 235000012239 silicon dioxide Nutrition 0.000 abstract 6
- 229910052682 stishovite Inorganic materials 0.000 abstract 6
- 239000000758 substrate Substances 0.000 abstract 6
- 229910052905 tridymite Inorganic materials 0.000 abstract 6
- 238000009792 diffusion process Methods 0.000 abstract 4
- 238000000034 method Methods 0.000 abstract 2
- 239000012535 impurity Substances 0.000 abstract 1
- 238000001259 photo etching Methods 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Landscapes
- Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
PURPOSE:To obtain the semiconductor device, especially a diffusion self-aligning vertical type MOSFET, in which the lowering of yield rate due to the pinholes of resist can be prevented by a method wherein the number of photo etching processes of a thick field SiO2 film is reduced to one step. CONSTITUTION:An Si layer 2 is formed on an Si substrate 1. An ion is implanted in the layer 2 using the SiO2 film 3 as a mask, a P-layer 5 is formed by diffusion, and then a thick SiO2 film 6 to be used for field is formed. Then, an active region and the SiO2 film on the circumference of the substrate are removed. Subsequently, an SiO2 film 7 is formed, and after a polycrystalline Si layer has been formed, an Si layer 8 is left over and the others are removed. Then, a photoresist 9 is placed on the circumferential part of the substrate, an ion is implanted and diffusion is performed. The resist 9 is removed, a P-layer 10 to be turned into a channel part is formed in a self-matching manner, and the SiO2 film on the circumference of the substrate is also removed. Then, donor impurities are deposited by diffusion on the window section of the substrate, an N<+> layer 11 to be turned into a source is formed on the active region, and an N<+> layer 12 to be turned into an annular ring formed on the circumferential region of the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3941381A JPS57154874A (en) | 1981-03-20 | 1981-03-20 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3941381A JPS57154874A (en) | 1981-03-20 | 1981-03-20 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57154874A true JPS57154874A (en) | 1982-09-24 |
Family
ID=12552295
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3941381A Pending JPS57154874A (en) | 1981-03-20 | 1981-03-20 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57154874A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996029744A1 (en) * | 1995-03-17 | 1996-09-26 | Hitachi, Ltd. | Planar semiconductor device, its manufacturing method, and power converter |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50115777A (en) * | 1974-02-21 | 1975-09-10 |
-
1981
- 1981-03-20 JP JP3941381A patent/JPS57154874A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50115777A (en) * | 1974-02-21 | 1975-09-10 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996029744A1 (en) * | 1995-03-17 | 1996-09-26 | Hitachi, Ltd. | Planar semiconductor device, its manufacturing method, and power converter |
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