JPS56138920A - Method of selection and diffusion for impurities - Google Patents

Method of selection and diffusion for impurities

Info

Publication number
JPS56138920A
JPS56138920A JP4173680A JP4173680A JPS56138920A JP S56138920 A JPS56138920 A JP S56138920A JP 4173680 A JP4173680 A JP 4173680A JP 4173680 A JP4173680 A JP 4173680A JP S56138920 A JPS56138920 A JP S56138920A
Authority
JP
Japan
Prior art keywords
layer
polycrystalline
substrate
mask
laser annealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4173680A
Other languages
Japanese (ja)
Inventor
Osamu Hataishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4173680A priority Critical patent/JPS56138920A/en
Publication of JPS56138920A publication Critical patent/JPS56138920A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation

Abstract

PURPOSE:To unnecessitate the use of a mask matching as well as to prevent the contamination of a substrate by a method wherein an ion implantation and a laser annealing are performed using the polycrystalline semiconductor layer, which has been selectively provided on a semiconductor substrate 1 through an insulating layer, as a mask. CONSTITUTION:An SiO2 film 2 and a polycrystalline Si layer 3 are coated on an Si substrate 1, and after an aperture has been provided on the polycrystalline Si layer, an impurity element such as B and the like is ion implanted using said polycrystalline Si layer as a mask and an impurity diffused region 5 is formed by performing a laser annealing. Through these procedures, the contamination of the substrate generated with the laser annealing is performed is prevented by the SiO2 film and the selective diffusion under different state of conditions can be done by performing a self-alignment.
JP4173680A 1980-03-31 1980-03-31 Method of selection and diffusion for impurities Pending JPS56138920A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4173680A JPS56138920A (en) 1980-03-31 1980-03-31 Method of selection and diffusion for impurities

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4173680A JPS56138920A (en) 1980-03-31 1980-03-31 Method of selection and diffusion for impurities

Publications (1)

Publication Number Publication Date
JPS56138920A true JPS56138920A (en) 1981-10-29

Family

ID=12616702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4173680A Pending JPS56138920A (en) 1980-03-31 1980-03-31 Method of selection and diffusion for impurities

Country Status (1)

Country Link
JP (1) JPS56138920A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002175772A (en) * 2000-12-06 2002-06-21 Ulvac Japan Ltd Ion implanting device and ion implanting method
JP2008021827A (en) * 2006-07-13 2008-01-31 Renesas Technology Corp Manufacturing method for semiconductor device
KR100899773B1 (en) 2009-03-03 2009-05-28 주식회사 누리플랜 Vehicle protection fence
KR100909829B1 (en) 2009-03-03 2009-07-28 주식회사 누리플랜 Vehicle protection fence
CN104882369A (en) * 2014-02-28 2015-09-02 株洲南车时代电气股份有限公司 Silicon carbide ion implantation doped mask structure and preparation method thereof
CN113270482A (en) * 2021-05-20 2021-08-17 厦门市三安集成电路有限公司 Preparation method of MOSFET device
CN115799053A (en) * 2023-02-08 2023-03-14 通威微电子有限公司 High-energy ion implantation method and semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002175772A (en) * 2000-12-06 2002-06-21 Ulvac Japan Ltd Ion implanting device and ion implanting method
JP2008021827A (en) * 2006-07-13 2008-01-31 Renesas Technology Corp Manufacturing method for semiconductor device
KR100899773B1 (en) 2009-03-03 2009-05-28 주식회사 누리플랜 Vehicle protection fence
KR100909829B1 (en) 2009-03-03 2009-07-28 주식회사 누리플랜 Vehicle protection fence
CN104882369A (en) * 2014-02-28 2015-09-02 株洲南车时代电气股份有限公司 Silicon carbide ion implantation doped mask structure and preparation method thereof
CN113270482A (en) * 2021-05-20 2021-08-17 厦门市三安集成电路有限公司 Preparation method of MOSFET device
CN115799053A (en) * 2023-02-08 2023-03-14 通威微电子有限公司 High-energy ion implantation method and semiconductor device

Similar Documents

Publication Publication Date Title
JPS56160034A (en) Impurity diffusion
JPS57113289A (en) Semiconductor device and its manufacture
JPS57196573A (en) Manufacture of mos type semiconductor device
JPS56138920A (en) Method of selection and diffusion for impurities
JPS5710267A (en) Semiconductor device
JPS57133626A (en) Manufacture of semiconductor thin film
JPS5649523A (en) Manufacture of semiconductor device
JPS5694671A (en) Manufacture of mis field-effect semiconductor device
JPS57138178A (en) Field-defect semiconductor device
JPS57141966A (en) Manufacture of semiconductor device
JPS57132357A (en) Manufacture of semiconductor element
JPS55102269A (en) Method of fabricating semiconductor device
JPS559477A (en) Method of making semiconductor device
JPS55102271A (en) Method of fabricating semiconductor device
JPS5660015A (en) Manufacture of semiconductor device
JPS54104785A (en) P-wel and its forming method
JPS5272162A (en) Production of semiconductor device
JPS57199236A (en) Manufacture of oxide film isolation semiconductor device
JPS55138833A (en) Manufacture of semiconductor device
JPS57211226A (en) Manufacture of semiconductor device
JPS55165679A (en) Preparation of semiconductor device
JPS56158475A (en) Manufacture of semiconductor device
JPS56157023A (en) Manufacture of semiconductor device
JPS5739579A (en) Mos semiconductor device and manufacture thereof
JPS55145373A (en) Fabricating method of semiconductor device