JPS55134929A - Ion implantation - Google Patents

Ion implantation

Info

Publication number
JPS55134929A
JPS55134929A JP4220979A JP4220979A JPS55134929A JP S55134929 A JPS55134929 A JP S55134929A JP 4220979 A JP4220979 A JP 4220979A JP 4220979 A JP4220979 A JP 4220979A JP S55134929 A JPS55134929 A JP S55134929A
Authority
JP
Japan
Prior art keywords
film
substrate
ions
implantation
implanted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4220979A
Other languages
Japanese (ja)
Other versions
JPS6223452B2 (en
Inventor
Masakatsu Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP4220979A priority Critical patent/JPS55134929A/en
Publication of JPS55134929A publication Critical patent/JPS55134929A/en
Publication of JPS6223452B2 publication Critical patent/JPS6223452B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation

Landscapes

  • Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

PURPOSE:To suppress gas discharge from a film by hardening the film by implanting impurity ions which are nonconductive to a semiconductor substrate into an ion shielding mask for an organic light sensitive film which is used when implating ions to the substrate. CONSTITUTION:On an n-type silicon substrate 1, a p-type wafer region 2 is diffusion formed, and on the specified regions of the surface, a gate electrode 4 consisting of polycrystalline silicon is formed via a gate oxide film 3, and also a field oxide film 5 is formed. Next, a photoresist ion shielding film 8 with ion implantation windows 6 and 7 is formed all over the surface, and using the film as a mask, B<+> ions are implanted to form p-type source and drain regions, but before the implantation, the following processing is applied to the shielding film. Implanting F<+> ions which are nonconductive to the substrate 1 are implanted to the film 8 to harden the film 8, and leaving the implanted layer 9 on the surface of the substrate 1 formed then, B<+> ion implantation layers 12 and 13 are formed. By so doing, gas discharge from the film 8 is prevented and the accuracy of the amount of implantation is improved.
JP4220979A 1979-04-06 1979-04-06 Ion implantation Granted JPS55134929A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4220979A JPS55134929A (en) 1979-04-06 1979-04-06 Ion implantation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4220979A JPS55134929A (en) 1979-04-06 1979-04-06 Ion implantation

Publications (2)

Publication Number Publication Date
JPS55134929A true JPS55134929A (en) 1980-10-21
JPS6223452B2 JPS6223452B2 (en) 1987-05-22

Family

ID=12629622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4220979A Granted JPS55134929A (en) 1979-04-06 1979-04-06 Ion implantation

Country Status (1)

Country Link
JP (1) JPS55134929A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5302539A (en) * 1985-05-01 1994-04-12 Texas Instruments Incorporated VLSI interconnect method and structure
JP2001267266A (en) * 1999-12-22 2001-09-28 Axcelis Technologies Inc Method for implanting plasma immersion ion
JP2004146581A (en) * 2002-10-24 2004-05-20 Semiconductor Energy Lab Co Ltd Semiconductor device and its manufacturing method
CN102315105A (en) * 2010-07-08 2012-01-11 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device
JP2015077979A (en) * 2013-10-15 2015-04-23 株式会社タイヨーパッケージ Packaging box and development sheet for the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5302539A (en) * 1985-05-01 1994-04-12 Texas Instruments Incorporated VLSI interconnect method and structure
JP2001267266A (en) * 1999-12-22 2001-09-28 Axcelis Technologies Inc Method for implanting plasma immersion ion
JP2004146581A (en) * 2002-10-24 2004-05-20 Semiconductor Energy Lab Co Ltd Semiconductor device and its manufacturing method
US7683372B2 (en) 2002-10-24 2010-03-23 Semiconductor Energy Laboratory Co., Ltd Semiconductor apparatus and method for manufacturing the same
JP4627964B2 (en) * 2002-10-24 2011-02-09 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
CN102315105A (en) * 2010-07-08 2012-01-11 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device
JP2015077979A (en) * 2013-10-15 2015-04-23 株式会社タイヨーパッケージ Packaging box and development sheet for the same

Also Published As

Publication number Publication date
JPS6223452B2 (en) 1987-05-22

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