JPS5518042A - Method of fabricating semiconductor device - Google Patents
Method of fabricating semiconductor deviceInfo
- Publication number
- JPS5518042A JPS5518042A JP9079378A JP9079378A JPS5518042A JP S5518042 A JPS5518042 A JP S5518042A JP 9079378 A JP9079378 A JP 9079378A JP 9079378 A JP9079378 A JP 9079378A JP S5518042 A JPS5518042 A JP S5518042A
- Authority
- JP
- Japan
- Prior art keywords
- film
- mask
- oxide film
- region
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Element Separation (AREA)
Abstract
PURPOSE: To accurately position an isolation region between a P+ impurity region and source, drain regions in a semiconductor device by forming the insulating film of the isolation region by a mask formed by means of an ion implantation for forming the P+ impurity region.
CONSTITUTION: A silicon oxide film 2 is formed on a semiconductor substrate 1, and a silicon nitride film 3 is further coated on the film 2. Then, a P+ impurity region and an active region are coated by photoresist 4 to thereby remove the film 3 in the isolation region 13. After the photoresist 4 is then removed, a silicon oxide film 14 is formed thereon. Then, source, drain and gate regions are coated by photoresist 4 to thereby sequentially remove the films 3 and 2. Then, an ion is implanted with resist 4' and film 14 as mask, and the resist 4' is then removed. Thereafter, a P+ impurity region 5 and a field oxide film 6 are formed by heat treatment, and the films 3 and 2 are then sequentially removed. Then, a gate oxide film 7 and a poly-silicon electrode 8 are formed. Then, source and drain diffused layers 9 and 10 are formed with the films 6, 8 as mask. Thus, it becomes unnecessary to position the mask between the film 14 and the resist 4 to thereby accurately position the isolation region therebetween.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9079378A JPS5518042A (en) | 1978-07-24 | 1978-07-24 | Method of fabricating semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9079378A JPS5518042A (en) | 1978-07-24 | 1978-07-24 | Method of fabricating semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5518042A true JPS5518042A (en) | 1980-02-07 |
JPS6126223B2 JPS6126223B2 (en) | 1986-06-19 |
Family
ID=14008454
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9079378A Granted JPS5518042A (en) | 1978-07-24 | 1978-07-24 | Method of fabricating semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5518042A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6153196A (en) * | 1984-08-24 | 1986-03-17 | Fujitsu Ltd | Method of epitaxial growth of silicon |
JPS63178542A (en) * | 1987-01-19 | 1988-07-22 | Rohm Co Ltd | Isolation method of dielectric for semiconductor device |
-
1978
- 1978-07-24 JP JP9079378A patent/JPS5518042A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6153196A (en) * | 1984-08-24 | 1986-03-17 | Fujitsu Ltd | Method of epitaxial growth of silicon |
JPS63178542A (en) * | 1987-01-19 | 1988-07-22 | Rohm Co Ltd | Isolation method of dielectric for semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS6126223B2 (en) | 1986-06-19 |
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