JPS57149772A - Gate turn off thyristor - Google Patents

Gate turn off thyristor

Info

Publication number
JPS57149772A
JPS57149772A JP3582681A JP3582681A JPS57149772A JP S57149772 A JPS57149772 A JP S57149772A JP 3582681 A JP3582681 A JP 3582681A JP 3582681 A JP3582681 A JP 3582681A JP S57149772 A JPS57149772 A JP S57149772A
Authority
JP
Japan
Prior art keywords
layers
layer
gate
cathode
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3582681A
Other languages
Japanese (ja)
Other versions
JPH0136259B2 (en
Inventor
Tetsuo Sueoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Corp, Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Corp
Priority to JP3582681A priority Critical patent/JPS57149772A/en
Publication of JPS57149772A publication Critical patent/JPS57149772A/en
Publication of JPH0136259B2 publication Critical patent/JPH0136259B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1012Base regions of thyristors
    • H01L29/102Cathode base regions of thyristors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thyristors (AREA)

Abstract

PURPOSE:To improve turn off performance and to permit high-frequency operation as well by a method wherein cathode N layer are formed by split and surface gate layers and buried gate layers are formed on a gate P layer by dispersion. CONSTITUTION:Cathode N2 layers are formed with broad rectangular shape and buried gate layers 4 formed low-resistance layers P2<++> are arranged in a P2 layer corresponding to the central sections of the N2 layers by diffusion. And surface gate layers 5 consisting of high-impurity layers are arranged on the surface of the P2 layer lain between each N2 layer by diffusion. Oxide films 6 are arranged on the surfaces of the layes 5 by riding on the N2 layers by diffusion and the short-circuits between the N2 layers and the layers 5 are prevented when a cathode electrode 7 is covered on the whole surfaces of the N2 layers. And a load current flowing to the N2 layers is turned off by the gate action at both the layers 4 and layers 5. In this composition, the width of effective cathode layers becomes narrow even if the width of the layers 4 is made narrower than the width of the N2 layers. Furthermore, the influence of autodope can be eliminated even if each interval Wg of the layers 4 is broaden. As a result, turn on time and turn off time can be shortened.
JP3582681A 1981-03-12 1981-03-12 Gate turn off thyristor Granted JPS57149772A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3582681A JPS57149772A (en) 1981-03-12 1981-03-12 Gate turn off thyristor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3582681A JPS57149772A (en) 1981-03-12 1981-03-12 Gate turn off thyristor

Publications (2)

Publication Number Publication Date
JPS57149772A true JPS57149772A (en) 1982-09-16
JPH0136259B2 JPH0136259B2 (en) 1989-07-31

Family

ID=12452753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3582681A Granted JPS57149772A (en) 1981-03-12 1981-03-12 Gate turn off thyristor

Country Status (1)

Country Link
JP (1) JPS57149772A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60166161U (en) * 1984-04-11 1985-11-05 株式会社明電舎 GTO thyristor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60166161U (en) * 1984-04-11 1985-11-05 株式会社明電舎 GTO thyristor

Also Published As

Publication number Publication date
JPH0136259B2 (en) 1989-07-31

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