JPS60166161U - GTO thyristor - Google Patents
GTO thyristorInfo
- Publication number
- JPS60166161U JPS60166161U JP5321984U JP5321984U JPS60166161U JP S60166161 U JPS60166161 U JP S60166161U JP 5321984 U JP5321984 U JP 5321984U JP 5321984 U JP5321984 U JP 5321984U JP S60166161 U JPS60166161 U JP S60166161U
- Authority
- JP
- Japan
- Prior art keywords
- layer
- cathode
- gate
- selective diffusion
- gto thyristor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図及び第2図は従来の素子断面構造図、第3図は本
考案の一実施例を示す素子断面構造図、第4図は第3図
の要部平面構造図、第5図は第3図の不純物プロファイ
ルである。
K・・・カソード電極、G・・・ゲート電極、A・・・
アノード電極、P2・・・ゲート層、N2・・・カソー
ド′層、SiO2・・・酸化膜。1 and 2 are cross-sectional structural diagrams of a conventional device, FIG. 3 is a cross-sectional structural diagram of an element showing an embodiment of the present invention, FIG. 4 is a planar structural diagram of main parts of FIG. 3, and FIG. FIG. 3 is an impurity profile. K... cathode electrode, G... gate electrode, A...
Anode electrode, P2...gate layer, N2...cathode' layer, SiO2...oxide film.
Claims (1)
形成するGTOサイリスタにおいて、上記ゲートP2層
表面にエピタキシャル成長させたP2′一層に選択拡散
で形成したカソードN2層と、このカソードN2層を除
いて上記P2一層表面から選択拡散でかつ上記ゲート2
2層に達する深さまで形成したP2++層と、上記カソ
ードN2層で挾まれる領域の上記P2+1層表面に形成
した酸化膜と、上記カソードN2層領域を上記酸化膜上
で一括接続したカソード電極と、上記P2++層表面に
接続したゲート電極とを備えた構造を特徴とするGTO
サイリスタ。In a GTO thyristor having four layers of P1N1P2N2 and in which the cathode N2 layer is formed separately, the cathode N2 layer is epitaxially grown on the surface of the gate P2 layer and is formed by selective diffusion in one layer of P2', and the cathode N2 layer is formed by selective diffusion. Selective diffusion from the P2 single layer surface and the gate 2
A P2++ layer formed to a depth reaching two layers, an oxide film formed on the surface of the P2+1 layer in a region sandwiched by the cathode N2 layer, and a cathode electrode in which the cathode N2 layer region is collectively connected on the oxide film. , and a gate electrode connected to the surface of the P2++ layer.
Thyristor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5321984U JPS60166161U (en) | 1984-04-11 | 1984-04-11 | GTO thyristor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5321984U JPS60166161U (en) | 1984-04-11 | 1984-04-11 | GTO thyristor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60166161U true JPS60166161U (en) | 1985-11-05 |
Family
ID=30573873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5321984U Pending JPS60166161U (en) | 1984-04-11 | 1984-04-11 | GTO thyristor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60166161U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57128964A (en) * | 1981-02-02 | 1982-08-10 | Meidensha Electric Mfg Co Ltd | Semiconductor controlling rectifying device |
JPS57149772A (en) * | 1981-03-12 | 1982-09-16 | Meidensha Electric Mfg Co Ltd | Gate turn off thyristor |
-
1984
- 1984-04-11 JP JP5321984U patent/JPS60166161U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57128964A (en) * | 1981-02-02 | 1982-08-10 | Meidensha Electric Mfg Co Ltd | Semiconductor controlling rectifying device |
JPS57149772A (en) * | 1981-03-12 | 1982-09-16 | Meidensha Electric Mfg Co Ltd | Gate turn off thyristor |
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