JPH0279063U - - Google Patents

Info

Publication number
JPH0279063U
JPH0279063U JP1988158044U JP15804488U JPH0279063U JP H0279063 U JPH0279063 U JP H0279063U JP 1988158044 U JP1988158044 U JP 1988158044U JP 15804488 U JP15804488 U JP 15804488U JP H0279063 U JPH0279063 U JP H0279063U
Authority
JP
Japan
Prior art keywords
semiconductor layer
step portion
oxide film
tunnel oxide
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988158044U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988158044U priority Critical patent/JPH0279063U/ja
Publication of JPH0279063U publication Critical patent/JPH0279063U/ja
Pending legal-status Critical Current

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Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す薄膜メモリ素
子の断面図、第2図は本考案の他の実施例を示す
薄膜メモリ素子の断面図、第3図〜第5図はそれ
ぞれ従来のメモリ素子の断面図である。 21……絶縁基板、22……ゲート電極、23
……ゲート絶縁膜、24……トンネル酸化膜、2
4a……トンネル領域、25……半導体層、26
……ソース電極、27……ドレイン電極。
FIG. 1 is a sectional view of a thin film memory device showing one embodiment of the present invention, FIG. 2 is a sectional view of a thin film memory device showing another embodiment of the present invention, and FIGS. FIG. 2 is a cross-sectional view of a memory element. 21... Insulating substrate, 22... Gate electrode, 23
...Gate insulating film, 24...Tunnel oxide film, 2
4a... Tunnel region, 25... Semiconductor layer, 26
... Source electrode, 27 ... Drain electrode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁基板上に、ゲート電極と、ゲート絶縁膜と
、半導体層と、ソース、ドレイン電極を積層形成
するとともに、前記ゲート絶縁膜と前記半導体層
または前記ソース、ドレイン電極との間にトンネ
ル酸化膜を形成し、かつ前記トンネル酸化膜のう
ち、このトンネル酸化膜の下の電極または半導体
層の側縁の段差部に対応する段差部分をトンネル
領域としたことを特徴とする薄膜メモリ素子。
A gate electrode, a gate insulating film, a semiconductor layer, and a source and drain electrode are stacked on an insulating substrate, and a tunnel oxide film is provided between the gate insulating film and the semiconductor layer or the source and drain electrodes. 1. A thin film memory element, wherein a step portion of the tunnel oxide film corresponding to a step portion of an electrode under the tunnel oxide film or a step portion of a side edge of a semiconductor layer is used as a tunnel region.
JP1988158044U 1988-12-06 1988-12-06 Pending JPH0279063U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988158044U JPH0279063U (en) 1988-12-06 1988-12-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988158044U JPH0279063U (en) 1988-12-06 1988-12-06

Publications (1)

Publication Number Publication Date
JPH0279063U true JPH0279063U (en) 1990-06-18

Family

ID=31438017

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988158044U Pending JPH0279063U (en) 1988-12-06 1988-12-06

Country Status (1)

Country Link
JP (1) JPH0279063U (en)

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