JPS5676576A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS5676576A
JPS5676576A JP15345179A JP15345179A JPS5676576A JP S5676576 A JPS5676576 A JP S5676576A JP 15345179 A JP15345179 A JP 15345179A JP 15345179 A JP15345179 A JP 15345179A JP S5676576 A JPS5676576 A JP S5676576A
Authority
JP
Japan
Prior art keywords
semiconductor
type
regions
semiconductor region
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15345179A
Other languages
Japanese (ja)
Inventor
Yasunobu Ishii
Kazuyoshi Asai
Katsuhiko Kurumada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP15345179A priority Critical patent/JPS5676576A/en
Priority to FR8008805A priority patent/FR2454703B1/en
Priority to CA000354607A priority patent/CA1139893A/en
Priority to DE19803024826 priority patent/DE3024826C2/en
Priority to GB8021812A priority patent/GB2065967B/en
Priority to NL8003944A priority patent/NL189534C/en
Publication of JPS5676576A publication Critical patent/JPS5676576A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To facilitate the current control of an N type semiconductor region in a semiconductor device by forming a gate electrode exhibiting Schottky barrier contact with N type and ohmic contact with P type in the semiconductor formed by joining the P type and N type semiconductor regions.
CONSTITUTION: P type semiconductor regions 2, 3, a semiconductor region 4 disposed therebetween, and N type semiconductor region 7 having semiconductor regions 5, 6 disposed at both sides of the region 4 are connected in parallel on the main surface side of the semi-insulating semiconductor substrate 1. An electrode 8 which exhibits ohmic contacts 9, 10 with the regions 2, and 3 and Schottky barrier contact 11 with the semiconductor region 7 in metal is formed at the main surface side opposite to the semiconductor substrate 1 side. When reverse polarity control voltage is applied to the P-N junctions 16, 17 between the gate electrode 8 and the source electrode 12, there can be obtained a depletion layer expanding to the side of semiconductor region 4 with the extent responsive to the value.
COPYRIGHT: (C)1981,JPO&Japio
JP15345179A 1979-04-21 1979-11-26 Semiconductor device and manufacture thereof Pending JPS5676576A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP15345179A JPS5676576A (en) 1979-11-26 1979-11-26 Semiconductor device and manufacture thereof
FR8008805A FR2454703B1 (en) 1979-04-21 1980-04-18 FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD
CA000354607A CA1139893A (en) 1979-11-26 1980-06-23 Field effect transistor devices and methods of manufacturing the same
DE19803024826 DE3024826C2 (en) 1979-11-26 1980-07-01 Field effect transistor and process for its manufacture
GB8021812A GB2065967B (en) 1979-11-26 1980-07-03 Field effect transitor
NL8003944A NL189534C (en) 1979-11-26 1980-07-09 FIELD EFFECT TRANSISTOR.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15345179A JPS5676576A (en) 1979-11-26 1979-11-26 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS5676576A true JPS5676576A (en) 1981-06-24

Family

ID=15562833

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15345179A Pending JPS5676576A (en) 1979-04-21 1979-11-26 Semiconductor device and manufacture thereof

Country Status (5)

Country Link
JP (1) JPS5676576A (en)
CA (1) CA1139893A (en)
DE (1) DE3024826C2 (en)
GB (1) GB2065967B (en)
NL (1) NL189534C (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2501913A1 (en) * 1981-03-10 1982-09-17 Thomson Csf PLANAR TYPE FIELD EFFECT TRANSISTOR COMPRISING METALLIZED WELL ELECTRODES AND METHOD OF MANUFACTURING THE TRANSISTOR
KR920022546A (en) * 1991-05-31 1992-12-19 김광호 Structure of MOS transistor and its manufacturing method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2728532A1 (en) * 1977-06-24 1979-01-11 Siemens Ag Barrier layer FET on insulating substrate - has series of insular gate zones connected to common gate terminal and extending through whole layer thickness
NL188776C (en) * 1979-04-21 1992-09-16 Nippon Telegraph & Telephone FIELD EFFECT TRANSISTOR DEVICE AND METHOD FOR MANUFACTURING THESE.

Also Published As

Publication number Publication date
CA1139893A (en) 1983-01-18
DE3024826C2 (en) 1985-05-09
NL189534B (en) 1992-12-01
GB2065967A (en) 1981-07-01
GB2065967B (en) 1983-07-13
DE3024826A1 (en) 1981-05-27
NL189534C (en) 1993-05-03
NL8003944A (en) 1981-06-16

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