JPS5710247A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5710247A
JPS5710247A JP8473980A JP8473980A JPS5710247A JP S5710247 A JPS5710247 A JP S5710247A JP 8473980 A JP8473980 A JP 8473980A JP 8473980 A JP8473980 A JP 8473980A JP S5710247 A JPS5710247 A JP S5710247A
Authority
JP
Japan
Prior art keywords
region
substrate
junction
inactive
high concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8473980A
Other languages
Japanese (ja)
Other versions
JPS6320382B2 (en
Inventor
Tsuyoshi Tanahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8473980A priority Critical patent/JPS5710247A/en
Publication of JPS5710247A publication Critical patent/JPS5710247A/en
Publication of JPS6320382B2 publication Critical patent/JPS6320382B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To increase the withstanding voltage at a junction of MOSFET without degrading the degree of integration, by forming the low concentration region, wherein a reverse conductive type diffused layer formed on the surface of a substrate is contacted with an inactive region in the substrate. CONSTITUTION:Around a high concentration region 2, having reverse conducting type and the substrate 1, which is formed as a source and drain region, in the MOSFET, is provided a low concentration region 3 having the same conductive type as that of the region 2. In an inactive field region in this element, a high concentration region 5 having the same conducting type as that of the substrate 1 is provided beneath a thick insulating film 6. A junction is formed between the region 5 and the region 3, but a junction is not formed between the region 5 and the high concentration region 2. Since a depletion layers can be formed in the region 3, the withstanding voltage of the source and drain can be improved, and stray capacitance can be decreased. Since a broad inactive region is not required, the degree of integration is not degraded.
JP8473980A 1980-06-23 1980-06-23 Semiconductor device Granted JPS5710247A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8473980A JPS5710247A (en) 1980-06-23 1980-06-23 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8473980A JPS5710247A (en) 1980-06-23 1980-06-23 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5710247A true JPS5710247A (en) 1982-01-19
JPS6320382B2 JPS6320382B2 (en) 1988-04-27

Family

ID=13839059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8473980A Granted JPS5710247A (en) 1980-06-23 1980-06-23 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5710247A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0393272A (en) * 1989-09-06 1991-04-18 Fujitsu Ltd Semiconductor device
US5026656A (en) * 1988-02-01 1991-06-25 Texas Instruments Incorporated MOS transistor with improved radiation hardness

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4839874A (en) * 1971-09-22 1973-06-12
JPS5055274A (en) * 1973-09-12 1975-05-15
JPS5522856A (en) * 1978-08-07 1980-02-18 Toshiba Corp Semiconductor device and its manufacturing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4839874A (en) * 1971-09-22 1973-06-12
JPS5055274A (en) * 1973-09-12 1975-05-15
JPS5522856A (en) * 1978-08-07 1980-02-18 Toshiba Corp Semiconductor device and its manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5026656A (en) * 1988-02-01 1991-06-25 Texas Instruments Incorporated MOS transistor with improved radiation hardness
JPH0393272A (en) * 1989-09-06 1991-04-18 Fujitsu Ltd Semiconductor device

Also Published As

Publication number Publication date
JPS6320382B2 (en) 1988-04-27

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