JPS57130278A - Storage device - Google Patents

Storage device

Info

Publication number
JPS57130278A
JPS57130278A JP56015154A JP1515481A JPS57130278A JP S57130278 A JPS57130278 A JP S57130278A JP 56015154 A JP56015154 A JP 56015154A JP 1515481 A JP1515481 A JP 1515481A JP S57130278 A JPS57130278 A JP S57130278A
Authority
JP
Japan
Prior art keywords
address
storage
data
storage device
block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56015154A
Other languages
Japanese (ja)
Inventor
Hirosada Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP56015154A priority Critical patent/JPS57130278A/en
Publication of JPS57130278A publication Critical patent/JPS57130278A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To shorten transfer time greatly by achieving data transfer between storage blocks through the execution of an extremely simple instruction. CONSTITUTION:A storage device M is connected to a data bus Ld and an address bus La and is accessed externally by, e.g., a CPU1, a DMA controller 2, etc. The storage area of this storage device M is divided into storage blocks M0-M3. Address data Bx written in said block address storage part 3 on the basis of a block address Ax sent from the address bus La, and an address control part 4 selects a storage block Mx addressed by the address data Bx.
JP56015154A 1981-02-04 1981-02-04 Storage device Pending JPS57130278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56015154A JPS57130278A (en) 1981-02-04 1981-02-04 Storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56015154A JPS57130278A (en) 1981-02-04 1981-02-04 Storage device

Publications (1)

Publication Number Publication Date
JPS57130278A true JPS57130278A (en) 1982-08-12

Family

ID=11880874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56015154A Pending JPS57130278A (en) 1981-02-04 1981-02-04 Storage device

Country Status (1)

Country Link
JP (1) JPS57130278A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59104779A (en) * 1982-12-03 1984-06-16 Fujitsu Ltd Selection control system of memory array card
JPS59157882A (en) * 1983-02-28 1984-09-07 Nec Home Electronics Ltd Memory circuit
JPH01314351A (en) * 1988-04-29 1989-12-19 Siemens Ag Control of two memory areas with one data processor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59104779A (en) * 1982-12-03 1984-06-16 Fujitsu Ltd Selection control system of memory array card
JPS59157882A (en) * 1983-02-28 1984-09-07 Nec Home Electronics Ltd Memory circuit
JPH01314351A (en) * 1988-04-29 1989-12-19 Siemens Ag Control of two memory areas with one data processor

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